参数资料
型号: ID82C52
厂商: Intersil
文件页数: 2/20页
文件大小: 0K
描述: IC UART/BRG 5V 16MHZ 28-DIP
标准包装: 78
特点: 单芯片 UART/BRG
通道数: 1,UART
规程: RS232C
电源电压: 4.5 V ~ 5.5 V
带并行端口:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 通孔
封装/外壳: 28-CDIP(0.600",15.24mm)
供应商设备封装: 28-CDIP 熔接密封,带窗口
包装: 管件
10
FN2950.3
April 26, 2006
82C52 - 80C86 Interfacing
The following example (Figure 11) shows the interface for an
82C52 in an 80C86 system.
Use of the Intersil CMOS Interrupt Controller (82C59A) is
optional and necessary only if an interrupt driven system is
desired.
By using the Intersil CMOS 82C84A clock generator, the
system can be built with a single crystal providing both the
processor clock and the clock for the 82C52. The 82C52 has
special divider circuitry which is designed to supply industry
standard baud rates with a 2.4576MHz input frequency.
Using a 15MHz crystal as shown, results in less than a 2%
frequency error which is adequate for many applications. For
more precise baud rate requirements, a 14.7456MHz crystal
will drive the 80C86 at 4.9MHz and provide the 82C52 with
the standard baud rate input frequency of 2.4576MHz. If
baud rates above 156Kbaud are desired, the OSC output
can be used instead of the PCLK (
÷6) output for
asynchronous baud rates up to 1Mbaud.
NOTE: C1 = C2 = 20pF For CL = 20pF
C1 = C2 = 47pF For CL = 32pF
FIGURE 10.
C1 (NOTE)
GND
C2 (NOTE)
IX
OX
82C52
FIGURE 11. 80C86/82C52 INTERFACE
15MHz
X1
X2
CLK
PCLK
OSC
82C84A OR
82C85
INT
INTA
CLK
80C86
OR
80C88
5MHz
INT
IRX
82C59A
SDO
SDI
IX
82C52
CSO
INTA
AD0, AD7
2.5MHz
15MHz
82C88
(MAX MODE)
IORD
IOWR
ADDRESS BUS
2
CHIP SELECT
3
SERIAL
DATA
D0-D7
A0, A1
RD
WR
INTR, DR, TBRE
82C52
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