- 您现在的位置：买卖IC网 > PDF目录65572 > IDT2309B-1DCG (INTEGRATED DEVICE TECHNOLOGY INC) 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 PDF资料下载
参数资料
| 型号： | IDT2309B-1DCG |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | GREEN, SOIC-16 |
| 文件页数： | 7/10页 |
| 文件大小： | 219K |
| 代理商： | IDT2309B-1DCG |
6
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT2309B
3.3VZERODELAYCLOCKBUFFER
ZERO DELAY AND SKEW CONTROL
All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative
loading can affect and adjust the input/output delay. The Output Load Difference diagram illustrates the PLL's relative loading with respect to the other
outputs that can adjust the Input-Output (I/O) Delay.
For designs utilizing zero I/O Delay, all outputs including CLKOUT must be equally loaded. Even if the output is not used, it must have a capacitive
load equal to that on the other outputs in order to obtain true zero I/O Delay. If I/O Delay adjustments are needed, use the Output Load Difference diagram
to calculate loading differences between the CLKOUT pin and other outputs. For zero output-to-output skew, all outputs must be loaded equally.
REF TO CLKA/CLKB RELAY vs. OUTPUT LOAD DIFFERENCE BETWEEN CLKOUT PIN AND CLKA/CLKB PINS
REF
to
CLKA/CLKB
Delay
(ps)
OUTPUT LOAD DIFFERENCE BETWEEN CLKOUT PIN AND CLKA/CLKB PINS (pF)
1500
1000
500
0
-500
-1000
-1500
-30
-25
-20
-15
-10
-5
05
10
15
20
25
30
相关PDF资料 |
PDF描述 |
|---|---|
| IDT2309B-1HDCG | 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| IDT2309NZ-1HDCI8 | 2309 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| IDT2309NZ-1HDCG | 2309 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| IDT23S05-1DCGI | PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| IDT23S05-1DCGI8 | PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT2309B-1DCG8 | 功能描述:IC CLK BUFFER ZD STD DRV 16-SOIC RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
| IDT2309B-1DCGBLANK | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER |
| IDT2309B-1DCGI | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:3.3V ZERO DELAY CLOCK BUFFER |
| IDT2309B-1DCI | 功能描述:IC CLK BUFFER ZD STD DRV 16-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
| IDT2309B-1DCI8 | 功能描述:IC CLK BUFFER ZD STD DRV 16-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
发布紧急采购，3分钟左右您将得到回复。