参数资料
型号: IDT23S09T-1DC8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: 23S SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
封装: SOIC-16
文件页数: 4/6页
文件大小: 53K
代理商: IDT23S09T-1DC8
4
COMMERCIALTEMPERATURERANGE
IDT23S09T
2.5VZERODELAYCLOCKBUFFER,SPREADSPECTRUMCOMPATIBLE
ZERO DELAY AND SKEW CONTROL
All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative
loading can affect and adjust the input/output delay.
For designs utilizing zero I/O Delay, all outputs including CLKOUT must be equally loaded. Even if the output is not used, it must have a capacitive
load equal to that on the other outputs in order to obtain true zero I/O Delay. For zero output-to-output skew, all outputs must be loaded equally.
SPREAD SPECTRUM COMPATIBLE
Many systems being designed now use a technology called Spread Spectrum Frequency Timing Generation. This product is designed not to filter
off the Spread Spectrum feature of the reference input, assuming it exists. When a zero delay buffer is not designed to pass the Spread Spectrum feature
through, the result is a significant amount of tracking skew, which may cause problems in systems requiring synchronization.
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