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参数资料
| 型号： | IDT49FCT805BTSOI |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | FCT SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封装： | SOIC-20 |
| 文件页数： | 5/8页 |
| 文件大小： | 138K |
| 代理商： | IDT49FCT805BTSOI |
5
IDT49FCT805BT/CT
FASTCMOSBUFFER/CLOCKDRIVER
MILITARY/INDUSTRIAL/COMMERCIALTEMPERATURERANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(MILITARY)(1, 2)
FCT805BT
FCT805CT
Symbol
Parameter
Condition(3)
Min.(4)
Max.
Min.(4)
Max.
Unit
tPLH
tPHL
Propagation Delay
INA to OAx, INB to OBx
CL = 50pF
RL = 500
1.5
5.7
1.5
5.2
ns
tR
Output Rise Time
—
2
—
2
ns
tF
Output Fall Time
—
1.5
—
1.5
ns
tSK(o)
Output skew: skew between outputs of all banks of same package (inputs
tied together)
—
0.9
—
0.7
ns
tSK(p)
Pulse skew: skew between opposite transitions of same output (|t PHL–t PLH|)
—
0.9
—
0.8
ns
tSK(pp)
Package skew: skew between outputs of different packages at same power
supply voltage, temperature, package type and speed grade
—
1.5
—
1.2
ns
tPZL
tPZH
Output Enable Time
OEA to OAx, OEB to OBx
1.5
6.5
1.5
6
ns
tPLZ
tPHZ
Output Disable Time
OEA to OAx, OEB to OBx
1.5
6.5
1.5
6
ns
NOTES:
1. tPLH, tPHL, and tSK(pp) are production tested. All other parameters are guaranteed but not production tested.
2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation
delay limits do not imply skew.
3. See Test Circuits and Waveforms.
4. Minimum limits are guaranteed but not tested on Propagation Delays.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(INDUSTRIAL)(1, 2)
FCT805BT
FCT805CT
Symbol
Parameter
Condition(3)
Min.(4)
Max.
Min.(4)
Max.
Unit
tPLH
tPHL
Propagation Delay
INA to OAx, INB to OBx
CL = 50pF
RL = 500
1.5
5
1.5
4.5
ns
tR
Output Rise Time
—
1.5
—
1.5
ns
tF
Output Fall Time
—
1.5
—
1.5
ns
tSK(o)
Output skew: skew between outputs of all banks of same package (inputs
tied together)
—
0.7
—
0.5
ns
tSK(p)
Pulse skew: skew between opposite transitions of same output (|t PHL–t PLH|)
—
0.7
—
0.7
ns
tSK(pp)
Package skew: skew between outputs of different packages at same power
supply voltage, temperature, package type and speed grade
—1.2
—
1
ns
tPZL
tPZH
Output Enable Time
OEA to OAx, OEB to OBx
1.5
6
1.5
5
ns
tPLZ
tPHZ
Output Disable Time
OEA to OAx, OEB to OBx
1.5
6
1.5
5
ns
NOTES:
1. tPLH, tPHL, and tSK(pp) are production tested. All other parameters are guaranteed but not production tested.
2. Propagation delay range indicated by Min. and Max. limit is dues to Vcc, operating temperature, and process parameters. These propagation
delay limits do not imply skew.
3. See Test Circuits and Waveforms.
4. Minimum limits are guaranteed but not tested on Propagation Delays.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT49FCT805CT | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:FAST CMOS BUFFER/CLOCK DRIVER |
| IDT49FCT805CTD | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:FAST CMOS BUFFER/CLOCK DRIVER |
| IDT49FCT805CTDB | 制造商:Integrated Device Technology Inc 功能描述:IC CLK BUFFER DUAL 1:5 20CERDIP 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK BUFFER 1:5 20CERDIP |
| IDT49FCT805CTDPY | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:FAST CMOS BUFFER/CLOCK DRIVER |
| IDT49FCT805CTDPYB | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:FAST CMOS BUFFER/CLOCK DRIVER |
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