参数资料
型号: IDT49FCT806BTQI
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 时钟及定时
英文描述: FCT SERIES, LOW SKEW CLOCK DRIVER, 0 TRUE OUTPUT(S), 5 INVERTED OUTPUT(S), PDSO20
封装: QSOP-20
文件页数: 7/8页
文件大小: 138K
代理商: IDT49FCT806BTQI
7
IDT49FCT806BT/CT
FASTCMOSBUFFER/CLOCKDRIVER
MILITARY/INDUSTRIAL/COMMERCIALTEMPERATURERANGES
7V
VCC
Pulse
Generator
D.U.T.
50 0
500
RT
VIN
VOUT
50pF
CL
0V
VOH
tPLH
tPHL
VOL
tR
3V
1.5V
tF
2.0V
0.8V
1.5V
OU TPU T
IN PUT
CONTROL
IN PUT
tPLZ
0V
OU TPU T
N ORM ALLY
LOW
tPZH
0V
SW ITCH
CLO SED
OU TPU T
N ORM ALLY
HIGH
ENABLE
D ISABLE
SW ITCH
O PEN
tPH Z
0V
VOL
VOH
0.3V
1.5V
tPZL
3.5V
3V
1.5V
0V
VOH
tPLH
tPHL
VOL
3V
1.5V
OU TPU T
IN PUT
tSK(p) = tPHL - tPLH
0V
VOH
tPLH1
VOL
1.5V
OU TPU T 1
3V
1.5V
IN PUT
VOH
tSK(o)
VOL
1.5V
tSK(o) = tPLH2 - tPLH1 or tPH L2 - tPHL1
OU TPU T 2
tPLH1
tSK(o)
tPLH 2
tPH L2
0V
VOH
tPLH1
VOL
1.5V
PACKAGE 1
OU TPU T
3V
1.5V
IN PUT
VOH
tSK(pp)
VOL
1.5V
tSK(p) = tPLH2 - tPLH1 or tPHL2 - tPHL1
tPH L1
tSK(pp)
tPLH2
tPH L2
PACKAGE 2
OU TPU T
TEST CIRCUITS AND WAVEFORMS
ENABLE AND DISABLE TIMES
TEST CIRCUITS FOR ALL OUTPUTS
PULSE SKEW - tSK(pp)
PACKAGE DELAY
OUTPUT SKEW
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
PULSE SKEW - tSK(p)
ENABLE AND DISABLE TIMES
SWITCH POSITION
TEST
SWITCH
Disable LOW
Enable LOW
Closed
Disable HIGH
Enable HIGH
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTE:
1. Package 1 and Package 2 are same device type and speed grade.
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