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参数资料
| 型号： | IDT54FCT574TEB |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20 |
| 封装： | CERPACK-20 |
| 文件页数： | 2/7页 |
| 文件大小： | 146K |
| 代理商： | IDT54FCT574TEB |
2
MILITARYANDINDUSTRIALTEMPERATURERANGES
IDT54/74FCT574T/AT/CT
FAST CMOS OCTAL D REGISTER (3-STATE)
2
3
1
16
15
14
11
19
18
20
17
13
12
5
6
7
4
D20-1
SO20-2
SO20-7
SO20-8
SO20-9
E20-1
8
9
10
OE
D0
D1
VCC
D3
D4
D5
D7
GND
Q0
Q3
Q1
Q2
Q4
Q7
Q5
Q6
CP
D2
D6
1
2
3
4
5
7
9
6
8
10
11
12
13
14
15
16
17
18
19
20
L20-2
Q3
Q1
Q2
Q4
Q5
D
1
D
0
D
7
GN
D
CP
Q
7
Q
6
OE
V
CC
Q
0
INDEX
D6
D2
D5
D3
D4
CERDIP/ SOIC/ SSOP/ QSOP/ TSSOP/ CERPACK
TOP VIEW
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
NC = No Change
↑↑↑↑↑ = LOW-to-HIGH transition
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Max.
Unit
VTERM(2)
Terminal Voltage with Respect to GND
–0.5 to +7
V
VTERM(3)
Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–60 to +120
mA
8T-link
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
No
terminal voltage may exceed Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Outputs and I/O terminals only.
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
6
10
pF
COUT
Output Capacitance
VOUT = 0V
8
12
pF
8T-link
NOTE:
1. This parameter is measured at characterization but not tested.
LCC
TOP VIEW
PIN DESCRIPTION
Pin Names
Description
DN
D flip-flop data inputs
CP
Clock Pulse for the register. Enters data on LOW-to-
HIGH transition.
QN
3-state outputs (TRUE)
QN
3-state outputs (INVERTED)
OE
Active LOW 3-state Output Enable input
FUNCTION TABLE (1)
Inputs
Outputs
Internal
Function
OE
CP
DN
QN
HI-Z
H
L
H
X
Z
NC
LOAD
REGISTER
L
H
↑
L
H
L
H
L
H
Z
H
L
H
L
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