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参数资料
| 型号： | IDT5V49EE902NLGI |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 3/33页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN PLL 500MHZ 32VFQFPN |
| 标准包装： | 490 |
| 类型： | * |
| PLL： | 带旁路 |
| 输入： | LVCMOS，LVTTL，晶体 |
| 输出： | HCSL，LVCMOS，LVDS，LVPECL，LVTTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 3:7 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 500MHz |
| 除法器/乘法器： | 是/是 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-VFQFPN（5x5） |
| 包装： | 托盘 |
| 其它名称： | 800-2582 |
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IDT5V49EE902
EEPROM PROGRAMMABLE CLOCK GENERATOR
CLOCK SYNTHESIZER
IDT EEPROM PROGRAMMABLE CLOCK GENERATOR
11
IDT5V49EE902
REV P 092412
PLL Loop Bandwidth:
Charge pump gain (K
φ) = Ip / 2π
VCO gain (KVCO) = 900 MHz/V * 2
π
M = Total multiplier value (See the Reference Divider,
Feedback Divider and Output Divider section for more
detail)
ωc = (Rz * Kφ * KVCO * Cz)/(M * (Cz + Cp))
Fc =
ωc / 2π
Note, the phase/frequency detector frequency (FPFD) is
typically seven times the PLL closed-loop bandwidth (Fc)
but too high of a ratio will reduce the phase margin thus
compromising loop stability.
To determine if the loop is stable, the phase margin (
φm)
needs to be calculated as follows.
Phase Margin:
ωz = 1 / (Rz * Cz)
ωp = (Cz + Cp)/(Rz * Cz * Cp)
φm = (360 / 2π) * [tan-1(ωc/ ωz) - tan-1(ωc/ ωp)]
To ensure stability in the loop, the phase margin is
recommended to be > 60° but too high will result in the lock
time being excessively long. Certain loop filter parameters
would need to be compromised to not only meet a required
loop bandwidth but to also maintain loop stability.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT5V49EE902NLGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC CLK GEN EEPROM PROGR 32QFN |
| IDT5V49EE903NLGI | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GENERATOR |
| IDT5V49EE903NLGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC CLK GEN EEPROM PROGR 32QFN |
| IDT5V49EE903PGGI | 制造商:Integrated Device Technology Inc 功能描述:IC CLOCK GENERATOR |
| IDT5V49EE903PGGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC CLK GEN EEPROM PROGR 28TSSOP |
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