参数资料
型号: IDT7008L55J
厂商: IDT, Integrated Device Technology Inc
文件页数: 11/19页
文件大小: 0K
描述: IC SRAM 512KBIT 55NS 84PLCC
标准包装: 9
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,异步
存储容量: 512K (64K x 8)
速度: 55ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 84-LCC(J 形引线)
供应商设备封装: 84-PLCC(29.21x29.21)
包装: 管件
其它名称: 7008L55J
IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Timing Waveform of Semaphore Read after Write Timing, Either Side (1)
t SAA
t OH
A 0 -A 2
VALID ADDRESS
VALID ADDRESS
SEM
DATA 0
t AW
t WR
t EW
t DW
DATA IN VALID
t SOP
t ACE
DATA OUT
VALID (2)
R/ W
t AS
t WP
t DH
OE
t SWRD
t SOP
t AOE
Write Cycle
Read Cycle
3198 drw 11
NOTES:
1. CE = V IH for the duration of the above timing (both write and read cycle) (Refer to Chip Enable Truth Table).
2. "DATA OUT VALID" represents all I/O's (I/O 0 - I/O 15 ) equal to the semaphore value.
Timing Waveform of Semaphore Write Contention (1,3,4)
A 0"A" -A 2"A"
MATCH
SIDE
SIDE
(2)
(2)
"A"
"B"
R/ W "A"
SEM "A"
A 0"B" -A 2"B"
R/ W "B"
SEM "B"
MATCH
t SPS
3198 drw 12
NOTES:
1. D OR = D OL = V IL , CE L = CE R = V IH (Refer to Chip Enable Truth Table).
2. All timing is the same for left and right ports. Port "A" may be either left or right port. "B" is the opposite from port "A".
3. This parameter is measured from R/ W "A" or SEM "A" going HIGH to R/ W "B" or SEM "B" going HIGH.
4. If t SPS is not satisfied, the semaphore will fall positively to one side or the other, but there is no guarantee which side will obtain the flag.
11
6.42
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