参数资料
型号: IDT7014S25JI
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: DRAM
英文描述: HIGH-SPEED 4K x 9DUAL-PORT STATIC RAM
中文描述: 4K X 9 DUAL-PORT SRAM, 25 ns, PQCC52
封装: PLASTIC, LCC-52
文件页数: 7/9页
文件大小: 89K
代理商: IDT7014S25JI
6.42
IDT7014S/L
High-Speed 4K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
+,%-,
%&'()*
NOTES:
1. Transition is measured 0mV fromLow or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. The specification for t
DH
must be met by the device supplying write data to the RAMunder all operating conditions. Although t
DH
and t
OW
values will vary over voltage
and temperature, the actual t
DH
will always be smaller than the actual t
OW
.
4. Port-to-port delay through RAMcells fromwriting port to reading port, refer to
Timng Waveformof Write With Port-to-Port Read
.
Symbol
Parameter
7014S12
Com'l Only
7014S15
Com'l & Ind
Unit
Mn.
Max.
Mn.
Max.
WRITE CYCLE
t
WC
Write Cycle Time
12
____
15
____
ns
t
AW
Address Valid to End-of-Write
10
____
14
____
ns
t
AS
Address Set-up Time
0
____
0
____
ns
t
WP
Write Pulse Width
10
____
12
____
ns
t
WR
Write Recovery Time
1
____
1
____
ns
t
DW
Data Valid to End-of-Write
8
____
10
____
ns
t
HZ
Output High-Z Time
(1,2)
____
7
____
7
ns
t
DH
Data Hold Time
(3)
0
____
0
____
ns
t
WZ
Write Enable to Output in High-Z
(1,2)
____
7
____
7
ns
t
OW
Output Active fromEnd-of-Write
(1,2,3)
0
____
0
____
ns
t
WDD
Write Pulse to Data Delay
(4)
____
25
____
30
ns
t
DDD
Write Data Valid to Read Data Delay
(4)
____
22
____
25
ns
2528 tbl 09a
Symbol
Parameter
7014S20
Com'l & Ind
7014S25
Com'l & Ind
Unit
Mn.
Max.
Mn.
Max.
WRITE CYCLE
t
WC
Write Cycle Time
20
____
25
____
ns
t
AW
Address Valid to End-of-Write
15
____
20
____
ns
t
AS
Address Set-up Time
0
____
0
____
ns
t
WP
Write Pulse Width
15
____
20
____
ns
t
WR
Write Recovery Time
2
____
2
____
ns
t
DW
Data Valid to End-of-Write
12
____
15
____
ns
t
HZ
Output High-Z Time
(1,2)
____
9
____
11
ns
t
DH
Data Hold Time
(3)
0
____
0
____
ns
t
WZ
Write Enable to Output in High-Z
(1,2)
____
9
____
11
ns
t
OW
Output Active fromEnd-of-Write
(1,2,3)
0
____
0
____
ns
t
WDD
Write Pulse to Data Delay
(4)
____
40
____
45
ns
t
DDD
Write Data Valid to Read Data Delay
(4)
____
30
____
35
ns
2528 tbl 09b
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IDT7014S25PFI HIGH-SPEED 4K x 9DUAL-PORT STATIC RAM
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