参数资料
型号: IDT7015L17PF8
厂商: IDT, Integrated Device Technology Inc
文件页数: 9/20页
文件大小: 0K
描述: IC SRAM 72KBIT 17NS 80TQFP
标准包装: 750
格式 - 存储器: RAM
存储器类型: SRAM - 双端口,异步
存储容量: 72K(8K x 9)
速度: 17ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: 0°C ~ 70°C
封装/外壳: 80-LQFP
供应商设备封装: 80-TQFP(14x14)
包装: 带卷 (TR)
其它名称: 7015L17PF8
IDT7015S/L
High-Speed 8K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage (5)
7015X12
Com'l Only
7015X15
Com'l Only
7015X17
Com'l Only
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
WRITE CYCLE
t WC
Write Cycle Time
12
____
15
____
17
____
ns
t EW
Chip Enable to End-of-Write
(3)
10
____
12
____
12
____
ns
t AW
Address Valid to End-of-Write
10
____
12
____
12
____
ns
t AS
Address Set-up Time
(3)
0
____
0
____
0
____
ns
t WP
t WR
t DW
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
10
2
10
____
____
____
12
2
10
____
____
____
12
0
10
____
____
____
ns
ns
ns
t HZ
Output High-Z Time
(1,2)
____
10
____
10
____
10
ns
t DH
Data Hold Time
(4)
0
____
0
____
0
____
ns
Write Enable to Output in High-Z
t WZ
(1,2)
____
10
____
10
____
10
ns
t OW
t SWRD
t SPS
Output Active from End-of-Write
SEM Flag Write to Read Time
SEM Flag Contention Window
(1,2,4)
3
5
5
____
____
____
3
5
5
____
____
____
0
5
5
____
____
____
ns
ns
ns
2954 tbl 13a
7015X20
Com'l, Ind
& Military
7015X25
Com'l &
Military
7015X35
Com'l &
Military
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
WRITE CYCLE
t WC
Write Cycle Time
20
____
25
____
35
____
ns
t EW
Chip Enable to End-of-Write
(3)
15
____
20
____
30
____
ns
t AW
Address Valid to End-of-Write
15
____
20
____
30
____
ns
t AS
Address Set-up Time
(3)
0
____
0
____
0
____
ns
t WP
t WR
t DW
Write Pulse Width
Write Recovery Time
Data Valid to End-of-Write
15
2
15
____
____
____
20
2
15
____
____
____
25
0
15
____
____
____
ns
ns
ns
t HZ
Output High-Z Time
(1,2)
____
12
____
15
____
20
ns
t DH
Data Hold Time
(4)
0
____
0
____
0
____
ns
Write Enable to Output in High-Z
t WZ
(1,2)
____
12
____
15
____
20
ns
t OW
t SWRD
t SPS
Output Active from End-of-Write
SEM Flag Write to Read Time
SEM Flag Contention Window
(1,2,4)
3
5
5
____
____
____
3
5
5
____
____
____
3
5
5
____
____
____
ns
ns
ns
NOTES:
2954 tbl 13b
1. Transition is measured 0mV from Low- or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization but not tested.
3. To access RAM, CE = V IL and SEM = V IH . To access semaphore, CE = V IH and SEM = V IL . Either condition must be valid for the entire t EW time.
4. The specification for t DH must be met by the device supplying write data to the RAM under all operating conditions. Although t DH and t OW values will vary over voltage
and temperature, the actual t DH will always be smaller than the actual t OW .
5. 'X' in part numbers indicates power rating (S or L).
9
6.42
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