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参数资料
| 型号： | IDT70V06L55PF8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 21/23页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 128KBIT 55NS 64TQFP |
| 标准包装： | 750 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，异步 |
| 存储容量： | 128K (16K x 8) |
| 速度： | 55ns |
| 接口： | 并联 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-TQFP（14x14） |
| 包装： | 带卷 (TR) |
| 其它名称： | 70V06L55PF8 |
IDT70V06S/L
High-Speed 3.3V 16K x 8 Dual-Port Static RAM
Using Semaphores—Some Examples
Perhaps the simplest application of semaphores is their application as
resource markers for the IDT70V06’s Dual-Port SRAM. Say the 16K x
8 SRAM was to be divided into two 8K x 8 blocks which were to be
dedicated at any one time to servicing either the left or right port. Semaphore
0 could be used to indicate the side which would control the lower section
of memory, and Semaphore 1 could be defined as the indicator for the
upper section of memory.
To take a resource, in this example the lower 8K of Dual-Port
SRAM, the processor on the left port could write and then read a zero in
to Semaphore 0. If this task were successfully completed (a zero was read
back rather than a one), the left processor would assume control of the
lower 8K. Meanwhile the right processor was attempting to gain control of
the resource after the left processor, it would read back a one in response
to the zero it had attempted to write into Semaphore 0. At this point, the
software could choose to try and gain control of the second 8K section by
writing, then reading a zero into Semaphore 1. If it succeeded in gaining
control, it would lock out the left side.
Once the left side was finished with its task, it would write a one to
Semaphore 0 and may then try to gain access to Semaphore 1. If
Semaphore 1 was still occupied by the right side, the left side could
undo its semaphore request and perform other tasks until it was able
to write, then read a zero into Semaphore 1. If the right processor
performs a similar task with Semaphore 0, this protocol would allow the
two processors to swap 8K blocks of Dual-Port SRAM with each other.
The blocks do not have to be any particular size and can even be
variable, depending upon the complexity of the software using the
semaphore flags. All eight semaphores could be used to divide the
L PORT
SEMAPHORE
REQUEST FLIP FLOP
Industrial and Commercial Temperature Ranges
Dual-Port SRAM or other shared resources into eight parts. Semaphores
can even be assigned different meanings on different sides rather than
being given a common meaning as was shown in the example above.
Semaphores are a useful form of arbitration in systems like disk
interfaces where the CPU must be locked out of a section of memory
during a transfer and the I/O device cannot tolerate any wait states.
With the use of semaphores, once the two devices has determined
which memory area was “off-limits” to the CPU, both the CPU and the
I/O devices could access their assigned portions of memory continu-
ously without any wait states.
Semaphores are also useful in applications where no memory
“WAIT” state is available on one or both sides. Once a semaphore
handshake has been performed, both processors can access their
assigned SRAM segments at full speed.
Another application is in the area of complex data structures. In this
case, block arbitration is very important. For this application one
processor may be responsible for building and updating a data
structure. The other processor then reads and interprets that data
structure. If the interpreting processor reads an incomplete data
structure, a major error condition may exist. Therefore, some sort of
arbitration must be used between the two different processors. The
building processor arbitrates for the block, locks it and then is able to
go in and update the data structure. When the update is completed, the
data structure block is released. This allows the interpreting processor
to come back and read the complete data structure, thereby guaran-
teeing a consistent data structure.
R PORT
SEMAPHORE
REQUEST FLIP FLOP
D 0
D
Q
Q
D
D 0
WRITE
SEMAPHORE
READ
WRITE
SEMAPHORE
READ
Figure 4. IDT70V06 Semaphore Logic
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| IDT70V06S15J | 功能描述:IC SRAM 128KBIT 15NS 68PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口，同步 存储容量:1.125M（32K x 36） 速度:5ns 接口:并联 电源电压:3.15 V ~ 3.45 V 工作温度:-40°C ~ 85°C 封装/外壳:256-LBGA 供应商设备封装:256-CABGA（17x17） 包装:带卷 (TR) 其它名称:70V3579S5BCI8 |
| IDT70V06S15J8 | 功能描述:IC SRAM 128KBIT 15NS 68PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:45 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口，异步 存储容量:128K（8K x 16） 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x14） 包装:托盘 其它名称:70V25S15PF |
| IDT70V06S15PF | 功能描述:IC SRAM 128KBIT 15NS 64TQFP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:45 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口，异步 存储容量:128K（8K x 16） 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x14） 包装:托盘 其它名称:70V25S15PF |
| IDT70V06S15PF8 | 功能描述:IC SRAM 128KBIT 15NS 64TQFP RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:45 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口，异步 存储容量:128K（8K x 16） 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x14） 包装:托盘 其它名称:70V25S15PF |
| IDT70V06S20J | 功能描述:IC SRAM 128KBIT 20NS 68PLCC RoHS:否 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:45 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 双端口，异步 存储容量:128K（8K x 16） 速度:15ns 接口:并联 电源电压:3 V ~ 3.6 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x14） 包装:托盘 其它名称:70V25S15PF |
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