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| 型号： | IDT7142LA20J8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 2/16页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 16KBIT 20NS 52PLCC |
| 标准包装： | 400 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 双端口，异步 |
| 存储容量： | 16K (2K x 8) |
| 速度： | 20ns |
| 接口： | 并联 |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 52-LCC（J 形引线） |
| 供应商设备封装： | 52-PLCC（19x19） |
| 包装： | 带卷 (TR) |
| 其它名称： | 7142LA20J8 |
IDT7132SA/LA and IDT 7142SA/LA
High Speed 2K x 8 Dual Port Static RAM
Description
The IDT7132/IDT7142 are high-speed 2K x 8 Dual-Port Static RAMs.
The IDT7132 is designed to be used as a stand-alone 8-bit Dual-Port RAM
or as a “MASTER” Dual-Port RAM together with the IDT7142 “SLAVE”
Dual-Port in 16-bit-or-more word width systems. Using the IDT MASTER/
SLAVE Dual-Port RAM approach in 16-or-more-bit memory system
applications results in full-speed, error-free operation without the need for
additional discrete logic.
Both devices provide two independent ports with separate control,
address, and l/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature, controlled by CE permits the on-chip circuitry of each port to enter
Pin Configurations (1,2,3)
Military, Industrial and Commercial Temperature Ranges
a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 325mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each Dual-
Port typically consuming 200μW from a 2V battery.
The IDT7132/7142 devices are packaged in a 48-pin sidebraze or
plastic DIPs, 48-pin LCCs, 52-pin PLCCs, and 48-lead flatpacks.
Military grade product is manufactured in compliance with the latest
revision of MIL-PRF-38535 QML, making it ideally suited to military
temperature applications demanding the highest level of performance
and reliability.
8
41
&
42
IDT7132/42L48 or F
F48-1
CE L
R/ W L
BUSY L
A 10L
OE L
A 0L
A 1L
A 2L
A 3L
A 4L
A 5L
A 6L
A 7L
A 8L
A 9L
I/O 0L
I/O 1L
I/O 2L
I/O 3L
I/O 4L
I/O 5L
I/O 6L
I/O 7L
GND
1 48
2 47
3 46
4 45
5 44
6 43
7 IDT7132/ 42
7142
9 P or C 40
10 39
11 P48-1 (4) 38
12 37
13 C48-2 (4) 36
14 35
15 48-Pin 34
16 DIP 33
17 Top 32
18 View (5) 31
19 30
20 29
21 28
22 27
23 26
24 25
V CC
CE R
R/ W R
BUSY R
A 10R
OE R
A 0R
A 1R
A 2R
A 3R
A 4R
A 5R
A 6R
A 7R
A 8R
A 9R
I/O 7R
I/O 6R
I/O 5R
I/O 4R
I/O 3R
I/O 2R
I/O 1R
I/O 0R
INDEX
A 1L
A 2L
A 3L
A 4L
A 5L
A 6L
A 7L
A 8L
A 9L
I/O 0L
I/O 1L
I/O 2L
,
6 5 4
7
8
9
10
11
12
13
14
15
16
17
18
19 20 21
3 2 48 47 46 45 44 43
1
41
40
39
L48-1 (4) 38
&
(4) 37
36
48-Pin LCC/ Flatpack
Top View (5) 35
34
33
32
31
22 23 24 25 26 27 28 29 30
A 0R
A 1R
A 2R
A 3R
A 4R
A 5R
A 6R
A 7R
A 8R
A 9R
I/O 7R
I/O 6R
2692 drw 03
,
2692 drw 02
NOTES:
1. All V CC pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. P48-1 package body is approximately .55 in x 2.43 in x .18 in.
C48-2 package body is approximately .62 in x 2.43 in x .15 in.
L48-1 package body is approximately .57 in x .57 in x .68 in.
F48-1 package body is approximately .75 in x .75 in x .11 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Capacitance (1) (T A = +25°C,f = 1.0MHz)
Symbol Parameter Conditions (2) Max. Unit
C IN
C OUT
Input Capacitance
Output Capacitance
V IN = 3dV
V OUT = 3dV
11
11
pF
pF
NOTES:
2692 tbl 00
1. This parameter is determined by device characterization but is not production
tested.
2. 3dV represents the interpolated capacitance when the input and output signals
switch from 3V to 0V.
2
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