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参数资料
| 型号： | IDT7143SA70PFB |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | DRAM |
| 英文描述： | HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS |
| 中文描述： | 2K X 16 DUAL-PORT SRAM, 70 ns, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 2/16页 |
| 文件大小： | 140K |
| 代理商： | IDT7143SA70PFB |
6.42
IDT7133SA/LA, IDT7143SA/LA
High-Speed 2K x 16 Dual-Port RAM Military, Industrial and Commercial Temperature Ranges
2746 drw 02
10
11
12
13
14
15
16
IDT7133/43
J68-1 / F68-1
(4)
68-Pin PLCC/Flatpack
Top View
(5)
50
49
48
47
46
45
44
INDEX
17
18
19
20
21
22
23
24
25
26
51
52
53
54
55
56
57
58
59
60
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
A
6L
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
BUSY
L
CE
L
CE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
BUSY
R
I/O
9L
I/O
10L
I/O
11L
I/O
12L
I/O
13L
I/O
14L
I/O
15L
V
CC
(1)
GND
(2)
I/O
0R
I/O
1R
I/O
2R
I/O
3R
I/O
4R
I/O
5R
I/O
6R
I/O
7R
I
1
I
2
I
3
I
4
I
5
I
6
I
7
I
8
V
C
(
A
1
A
9
A
8
A
7
R
W
L
O
L
I
9
I
1
I
1
I
1
I
1
I
1
A
6
A
7
A
8
A
9
I
8
A
1
G
(
O
R
R
W
R
R
W
R
I
1
I
0
R
W
L
!
memory systemapplications results in full-speed, error-free operation
without the need for additional discrete logic.
Both devices provide two independent ports with separate control,
address, and I/O pins that permt independent, asynchronous access
for reads or writes to any location in memory. An automatic power
down feature, controlled by
CE
, permts the on-chip circuitry of each
port to enter a very low standby power mode.
Fabricated using IDT
’
s CMOS high-performance technology, these
devices typically operate on only 1,150mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each port
typically consumng 200μW for a 2V battery.
The IDT7133/7143 devices have identical pinouts. Each is packed
in a 68-pin ceramc PGA, 68-pin flatpack, 68-pin PLCC and 100-pin
TQFP. Mlitary grade product is manufactured in compliance with the
latest revision of MIL-PRF-38535 QML, making it ideally suited to
mlitary temperature applications demanding the highest level of
performance and reliability.
NOTES:
1. Both V
CC
pins must be connected to the power supply to ensure reliable
operation.
2. Both GND pins must be connected to the ground supply to ensure reliable
operation.
3. J68-Package body is approximately 0.95 in x 0.95 in x 0.17 in.
F68-Package body is approximately 1.18 in x 1.18 in x 0.16 in.
PN100-Package body is approximately 14mmx 14mmx 1.4mm
4. This package code is used to reference the package diagram
5. This text does not indicate orientation of the actual part-marking.
Index
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
10099 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
IDT7133/43PF
PN100-1
(4)
100-Pin TQFP
Top View
(5)
N/C
N/C
N/C
N/C
I/O
10L
I/O
11L
I/O
12L
I/O
13L
GND
I/O
14L
I/O
15L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
N/C
N/C
N/C
N/C
2746 drw 03
N/C
N/C
N/C
N/C
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
N/C
BUSY
L
GND
N/C
BUSY
R
N/C
A
0R
A
1R
A
2R
A
3R
A
4R
N/C
N/C
N/C
N/C
I
9
I
8
I
7
I
6
I
5
I
4
I
3
I
2
G
I
1
I
0
O
L
V
C
R
W
L
C
L
R
W
L
N
N
N
A
1
A
9
A
8
A
7
A
6
I
7
I
8
I
9
I
1
I
1
I
1
I
1
I
1
G
I
1
R
W
R
G
N
N
A
1
A
9
A
8
A
7
A
6
A
5
N
N
N
O
R
C
R
R
W
R
,
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| IDT7143SA70PFI | HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS |
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