参数资料
型号: IDT7164S35YGI8
厂商: IDT, Integrated Device Technology Inc
文件页数: 3/10页
文件大小: 0K
描述: IC SRAM 64KBIT 35NS 28SOJ
产品变化通告: Product Discontinuation 29/Apr/2010
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: SRAM - 异步
存储容量: 64K (8K x 8)
速度: 35ns
接口: 并联
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
封装/外壳: 28-BSOJ
供应商设备封装: 28-SOJ
包装: 带卷 (TR)
其它名称: 7164S35YGI8
IDT7164S/L
CMOS Static RAM 64K (8K x 8-Bit)
Capacitance (T A = +25°C, f = 1.0MHz)
Military, Commercial, and Industrial Temperature Ranges
Symbol
C IN
C I/O
Parameter (1)
Input Capacitance
I/O Capacitance
Conditions
V IN = 0V
V OUT = 0V
Max.
8
8
Unit
pF
pF
NOTE:
2967 tbl 06
1. This parameter is determined by device characterization, but is not production
tested.
DC Electrical Characteristics (1)
(V CC = 5.0V ± 10%, V LC = 0.2V, V HC = V CC - 0.2V)
7 1 6 4 S 2 0
7 1 6 4 L 2 0
7 1 6 4 S 2 5
7 1 6 4 L 2 5
S y m b o l
I C C 1
I C C 2
I S B
I S B 1
P a r a m e t e r
O p e r a t i n g P o w e r S u p p l y C u r r e n t
C S 1 = V I L , C S 2 = V I H , O u t p u t s O p e n
V C C = M a x . , f = 0 ( 2 )
D y n a m i c O p e r a t i n g C u r r e n t
C S 1 = V I L , C S 2 = V I H , O u t p u t s O p e n
V C C = M a x . , f = f M A X ( 2 )
S t a n d b y P o w e r S u p p l y C u r r e n t
( T T L L e v e l ) , C S 1 > V I H , C S 2 < V I L ,
O u t p u t s O p e n , V C C = M a x . , f = f M A X ( 2 )
F u l l S t a n d b y P o w e r S u p p l y C u r r e n t
( C M O S L e v e l ) , f = 0 ( 2 ) , V C C = M a x .
1 . C S 1 > V H C a n d C S 2 > V H C , o r
2 . C S 2 < V L C
P o w e r
S
L
S
L
S
L
S
L
C o m ' l .
1 0 0
9 0
1 7 0
1 5 0
2 0
3
1 5
0 . 2
I n d .
1 1 0
1 0 0
1 7 0
1 5 0
2 0
3
1 5
0 . 2
M i l .
1 1 0
1 0 0
1 8 0
1 6 0
2 0
5
2 0
1
C o m ' l .
9 0
9 0
1 7 0
1 5 0
2 0
3
1 5
0 . 2
I n d .
1 1 0
1 0 0
1 7 0
1 5 0
2 0
3
1 5
0 . 2
M i l .
1 1 0
1 0 0
1 8 0
1 6 0
2 0
5
2 0
1
U n i t
m A
m A
m A
m A
2 9 6 7 t b l 0 7
7 1 6 4 S 3 5
7 1 6 4 L 3 5
7 1 6 4 S 4 5
7 1 6 4 L 4 5
7 1 6 4 S 5 5
7 1 6 4 L 5 5
7 1 6 4 S 7 0
7 1 6 4 L 7 0
7 1 6 4 S 8 5 / 1 0 0
7 1 6 4 L 8 5 / 1 0 0
S y m b o l
I C C 1
I C C 2
I S B
I S B 1
P a r a m e t e r
O p e r a t i n g P o w e r S u p p l y C u r r e n t
C S 1 = V I L , C S 2 = V I H , O u t p u t s O p e n
V C C = M a x . , f = 0 ( 2 )
D y n a m i c O p e r a t i n g C u r r e n t
C S 1 = V I L , C S 2 = V I H , O u t p u t s O p e n
V C C = M a x . , f = f M A X ( 2 )
S t a n d b y P o w e r S u p p l y C u r r e n t
( T T L L e v e l ) , C S 1 > V I H , C S 2 < V I L ,
O u t p u t s O p e n , V C C = M a x . , f = f M A X ( 2 )
F u l l S t a n d b y P o w e r S u p p l y C u r r e n t
( C M O S L e v e l ) , f = 0 ( 2 ) , V C C = M a x .
1 . C S 1 > V H C a n d C S 2 > V H C , o r
2 . C S 2 < V L C
P o w e r
S
L
S
L
S
L
S
L
M i l .
1 0 0
9 0
1 6 0
1 4 0
2 0
5
2 0
1
M i l .
1 0 0
9 0
1 6 0
1 3 0
2 0
5
2 0
1
M i l .
1 0 0
9 0
1 6 0
1 2 5
2 0
5
2 0
1
M i l .
1 0 0
9 0
1 6 0
1 2 0
2 0
5
2 0
1
M i l .
1 0 0
9 0
1 6 0
1 2 0
2 0
5
2 0
1
U n i t
m A
m A
m A
m A
2 9 6 7 t b l 0 8
NOTES:
1. All values are maximum guaranteed values.
2. f MAX = 1/t RC (all address inputs are cycling at f MAX ); f = 0 means no address input lines are changing.
3
6.42
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