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参数资料
| 型号： | IDT71V632S5PF8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 1/19页 |
| 文件大小： | 0K |
| 描述： | IC SRAM 2MBIT 5NS 100TQFP |
| 标准包装： | 1,000 |
| 格式 - 存储器： | RAM |
| 存储器类型： | SRAM - 同步 |
| 存储容量： | 2M（64K x 32） |
| 速度： | 5ns |
| 接口： | 并联 |
| 电源电压： | 3.135 V ~ 3.63 V |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 100-LQFP |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 带卷 (TR) |
| 其它名称： | 71V632S5PF8 |
64K x 32
3.3V Synchronous SRAM
Pipelined Outputs
Burst Counter, Single Cycle Deselect
IDT71V632/Z
64K x 32 memory configuration
Supports high system speed:
Single-cycle deselect functionality (Compatible with
LBO input selects interleaved or linear burst mode
Self-timed write cycle with global write control ( GW ), byte
Power down controlled by ZZ input
Operates with a single 3.3V power supply (+10/-5%)
Packaged in a JEDEC Standard 100-pin rectangular plastic
Features
◆
◆
Commercial:
– A4 4.5ns clock access time (117 MHz)
Commercial and Industrial:
– 5 5ns clock access time (100 MHz)
– 6 6ns clock access time (83 MHz)
– 7 7ns clock access time (66 MHz)
◆
Micron Part # MT58LC64K32D7LG-XX)
◆
◆
write enable ( BWE ), and byte writes ( BW x)
◆
◆
◆
thin quad flatpack (TQFP).
Description
The IDT71V632 is a 3.3V high-speed SRAM organized as 64K x 32
Pin Description Summary
with full support of the Pentium? and PowerPC? processor interfaces.
The pipelined burst architecture provides cost-effective 3-1-1-1 second-
ary cache performance for processors up to 117MHz.
The IDT71V632 SRAM contains write, data, address, and control
registers. Internal logic allows the SRAM to generate a self-timed write
based upon a decision which can be left until the extreme end of the write
cycle.
The burst mode feature offers the highest level of performance to the
system designer, as the IDT71V632 can provide four cycles of data for
a single address presented to the SRAM. An internal burst address counter
accepts the first cycle address from the processor, initiating the access
sequence. The first cycle of output data will be pipelined for one cycle before
it is available on the next rising clock edge. If burst mode operation is
selected ( ADV =LOW), the subsequent three cycles of output data will be
available to the user on the next three rising clock edges. The order of these
three addresses will be defined by the internal burst counter and the LBO
input pin.
The IDT71V632 SRAM utilizes IDT's high-performance, high-volume
3.3V CMOS process, and is packaged in a JEDEC Standard 14mm x
20mm 100-pin thin plastic quad flatpack (TQFP) for optimum board density
in both desktop and notebook applications.
A 0 – A 1 5
C E
C S 0 , C S 1
O E
G W
B W E
B W 1 , B W 2 , B W 3 , B W 4
C L K
A D V
A D S C
A D S P
L B O
Z Z
I / O 0 – I / O 3 1
V D D , V D D Q
V S S , V S S Q
A d d r e s s I n p u t s
C h i p E n a b l e
C h i p s S e l e c t s
O u t p u t E n a b l e
G l o b a l W r i t e E n a b l e
B y t e W r i t e E n a b l e
I n d i v i d u a l B y t e W r i t e S e l e c t s
C l o c k
B u r s t A d d r e s s A d v a n c e
A d d r e s s S t a t u s ( C a c h e C o n t r o l l e r )
A d d r e s s S t a t u s ( P r o c e s s o r )
L i n e a r / I n t e r l e a v e d B u r s t O r d e r
S l e e p M o d e
D a t a I n p u t / O u t p u t
3 . 3 V
A r r a y G r o u n d , I / O G r o u n d
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I n p u t
I / O
P o w e r
P o w e r
S y n c h r o n o u s
S y n c h r o n o u s
S y n c h r o n o u s
A s y n c h r o n o u s
S y n c h r o n o u s
S y n c h r o n o u s
S y n c h r o n o u s
N / A
S y n c h r o n o u s
S y n c h r o n o u s
S y n c h r o n o u s
D C
A s y n c h r o n o u s
S y n c h r o n o u s
N / A
N / A
3 6 1 9 t b l 0 1
Pentium processor is a trademark of Intel Corp.
PowerPC is a trademark of International Business Machines, Inc.
?2010 Integrated Device Technology, Inc.
1
MAY 2010
DSC-3619/07
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| IDT71V632S5PFG | 功能描述:IC SRAM 2MBIT 5NS 100TQFP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:3,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:32K (4K x 8) 速度:100kHz，400kHz 接口:I²C，2 线串口 电源电压:2.5 V ~ 5.5 V 工作温度:-40°C ~ 125°C 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:带卷 (TR) 其它名称:CAV24C32WE-GT3OSTR |
| IDT71V632S5PFG8 | 功能描述:IC SRAM 2MBIT 5NS 100TQFP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:4.5M（256K x 18） 速度:133MHz 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x20） 包装:托盘 |
| IDT71V632S5PFGI | 功能描述:IC SRAM 2MBIT 5NS 100TQFP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:4.5M（256K x 18） 速度:133MHz 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x20） 包装:托盘 |
| IDT71V632S5PFGI8 | 功能描述:IC SRAM 2MBIT 5NS 100TQFP RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:72 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步 存储容量:4.5M（256K x 18） 速度:133MHz 接口:并联 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 封装/外壳:100-LQFP 供应商设备封装:100-TQFP（14x20） 包装:托盘 |
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