参数资料
型号: IDT72285L15PFI8
厂商: IDT, Integrated Device Technology Inc
文件页数: 23/25页
文件大小: 0K
描述: IC FIFO 65536X18 LP 15NS 64-TQFP
标准包装: 750
系列: 7200
功能: 同步
存储容量: 1.1M(65K x 18)
访问时间: 15ns
电源电压: 4.5 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-TQFP(14x14)
包装: 带卷 (TR)
其它名称: 72285L15PFI8
7
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
IDT72275/72285
CMOS SuperSync FIFO 32,768 x 18 and 65,536 x 18
WhenconfiguredinIDTStandardmode,theEFandFFoutputsaredouble
register-bufferedoutputs.
Relevant timing diagrams for IDT Standard mode can be found in Figure
7, 8 and 11.
FIRST WORD FALL THROUGH MODE (FWFT)
In this mode, the status flags, IR, PAF, HF, PAE, and OR operate in the
manner outlined in Table 2. To write data into to the FIFO, WEN must be
LOW. Data presented to the DATA IN lines will be clocked into the FIFO on
subsequent transitions of WCLK. After the first write is performed, the
Output Ready (OR) flag will go LOW. Subsequent writes will continue to fill
up the FIFO. PAE will go HIGH after n + 2 words have been loaded into the
FIFO, where n is the empty offset value. The default setting for this value
is stated in the footnote of Table 2. This parameter is also user program-
mable. See section on Programmable Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the HF would toggle to LOW once the
16,386th word for the IDT72275 and 32,770th word for the IDT72285,
respectively was written into the FIFO. Continuing to write data into the
FIFO will cause the PAF to go LOW. Again, if no reads are performed, the
PAF will go LOW after (32,769-m) writes for the IDT72275 and (65,537-m)
writes for the IDT72285, where m is the full offset value. The default setting
for this value is stated in the footnote of Table 2.
When the FIFO is full, the Input Ready (IR) flag will go HIGH, inhibiting
further write operations. If no reads are performed after a reset, IR will go
HIGH after D writes to the FIFO. D = 32,769 writes for the IDT72275 and
65,537 writes for the IDT72285, respectively. Note that the additional word
in FWFT mode is due to the capacity of the memory plus output register.
If the FIFO is full, the first read operation will cause the IR flag to go LOW.
Subsequent read operations will cause the PAF and HF to go HIGH at the
conditions described in Table 2. If further read operations occur, without
write operations, the PAE will go LOW when there are n + 1 words in the
FIFO, where n is the empty offset value. Continuing read operations will
cause the FIFO to become empty. When the last word has been read from
the FIFO, OR will go HIGH inhibiting further read operations. REN is ignored
when the FIFO is empty.
When configured in FWFT mode, the OR flag output is triple register-
buffered, and the IR flag output is double register-buffered.
Relevant timing diagrams for FWFT mode can be found in Figure 9, 10
and 12.
PROGRAMMING FLAG OFFSETS
FullandEmptyFlagoffsetvaluesareuserprogrammable.TheIDT72275/
72285 has internal registers for these offsets. Default settings are stated in
the footnotes of Table 1 and Table 2. Offset values can be programmed into
the FIFO in one of two ways; serial or parallel loading method. The selection
of the loading method is done using the LD (Load) pin. During Master Reset,
the state of the LD input determines whether serial or parallel flag offset
programming is enabled. A HIGH on LD during Master Reset selects serial
loading of offset values and in addition, sets a default PAE offset value of
3FFH (a threshold 1,023 words from the empty boundary), and a default
PAF offset value of 3FFH (a threshold 1,023 words from the full boundary).
A LOW on LD during Master Reset selects parallel loading of offset values,
and in addition, sets a default PAE offset value of 07FH (a threshold 127
words from the empty boundary), and a default PAF offset value of 07FH
(athreshold127wordsfromthefullboundary).SeeFigure3,OffsetRegister
Location and Default Values.
FUNCTIONAL DESCRIPTION
TIMING MODES
IDT STANDARD VS FIRST WORD FALL THROUGH (FWFT) MODE
TheIDT72275/72285supporttwodifferenttimingmodesofoperation:IDT
Standard mode or First Word Fall Through (FWFT) mode. The selection of
whichmodewilloperateisdeterminedduringMasterReset,bythestateofthe
FWFT/SIinput.
If, at the time of Master Reset, FWFT/SI is LOW, then IDT Standard mode
will be selected. This mode uses the Empty Flag (EF) to indicate whether
or not there are any words present in the FIFO. It also uses the Full Flag
function (FF) to indicate whether or not the FIFO has any free space for
writing. In IDT Standard mode, every word read from the FIFO, including
the first, must be requested using the Read Enable (REN) and RCLK.
If, at the time of Master Reset, FWFT/SI is HIGH, then FWFT mode will
be selected. This mode uses Output Ready (OR) to indicate whether or not
there is valid data at the data outputs (Qn). It also uses Input Ready (IR)
to indicate whether or not the FIFO has any free space for writing. In the
FWFT mode, the first word written to an empty FIFO goes directly to Qnafter
three RCLK rising edges, REN = LOW is not necessary. Subsequent words
must be accessed using the Read Enable (REN) and RCLK.
Varioussignals,bothinputandoutputsignalsoperatedifferentlydepend-
ing on which timing mode is in effect.
IDT STANDARD MODE
In this mode, the status flags, FF, PAF, HF, PAE, and EF operate in the
manner outlined in Table 1. To write data into to the FIFO, Write Enable
(WEN) must be LOW. Data presented to the DATA IN lines will be clocked
intotheFIFOonsubsequenttransitionsoftheWriteClock(WCLK).Afterthe
first write is performed, the Empty Flag (EF) will go HIGH. Subsequent
writes will continue to fill up the FIFO. The Programmable Almost-Empty
flag (PAE) will go HIGH after n + 1 words have been loaded into the FIFO,
where n is the empty offset value. The default setting for this value is stated
in the footnote of Table 1. This parameter is also user programmable. See
section on Programmable Flag Offset Loading.
If one continued to write data into the FIFO, and we assumed no read
operations were taking place, the Half-Full flag (HF) would toggle to LOW
once the 16,385th word for IDT72275 and 32,769th word for IDT72285
respectively was written into the FIFO. Continuing to write data into the
FIFO will cause the Programmable Almost-Full flag (PAF) to go LOW.
Again, if no reads are performed, the PAF will go LOW after (32,768-m)
writes for the IDT72275 and (65,536-m) writes for the IDT72285. The offset
“m” is the full offset value. The default setting for this value is stated in the
footnote of Table 1. This parameter is also user programmable. See section
on Programmable Flag Offset Loading.
When the FIFO is full, the Full Flag (FF) will go LOW, inhibiting further
write operations. If no reads are performed after a reset, FF will go LOW
after D writes to the FIFO. D = 32,768 writes for the IDT72275 and 65,536
for the IDT72285, respectively.
If the FIFO is full, the first read operation will cause FF to go HIGH.
Subsequent read operations will cause PAF and HF to go HIGH at the
conditions described in Table 1. If further read operations occur, without
write operations, PAE will go LOW when there are n words in the FIFO,
where n is the empty offset value. Continuing read operations will cause the
FIFO to become empty. When the last word has been read from the FIFO,
theEFwillgoLOWinhibitingfurtherreadoperations.RENisignoredwhenthe
FIFO is empty.
相关PDF资料
PDF描述
MS27473T12B8PC CONN PLUG 8POS STRAIGHT W/PINS
ICL3241ECVZ IC 3DRVR/5RCVR RS232 3V 28-TSSOP
IDT72285L10PF8 IC FIFO 65536X18 LP 10NS 64-TQFP
ICL3241ECBZ-T IC 3DRVR/5RCVR RS232 3V 28-SOIC
V300B36M250BF CONVERTER MOD DC/DC 36V 250W
相关代理商/技术参数
参数描述
IDT72285L15TF 功能描述:IC FIFO 65536X18 LP 15NS 64STQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256(64 x 4) 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP(0.300",7.62mm) 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433
IDT72285L15TF8 功能描述:IC FIFO 65536X18 LP 15NS 64STQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256(64 x 4) 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP(0.300",7.62mm) 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433
IDT72285L15TFI 功能描述:IC FIFO 65536X18 LP 15NS 64STQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256(64 x 4) 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP(0.300",7.62mm) 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433
IDT72285L15TFI8 功能描述:IC FIFO 65536X18 LP 15NS 64STQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:15 系列:74F 功能:异步 存储容量:256(64 x 4) 数据速率:- 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:24-DIP(0.300",7.62mm) 供应商设备封装:24-PDIP 包装:管件 其它名称:74F433
IDT72285L20PF 功能描述:IC FIFO 65536X18 LP 20NS 64-TQFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:7200 标准包装:90 系列:74ABT 功能:同步,双端口 存储容量:4.6K(64 x 36 x2) 数据速率:67MHz 访问时间:- 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:120-LQFP 裸露焊盘 供应商设备封装:120-HLQFP(14x14) 包装:托盘 产品目录页面:1005 (CN2011-ZH PDF) 其它名称:296-3984