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参数资料
| 型号： | IDT728985JG |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 7/13页 |
| 文件大小： | 0K |
| 描述： | IC DGTL SW 256X256 44-PLCC |
| 标准包装： | 27 |
| 系列： | 7200 |
| 类型： | 多路复用器 |
| 电路： | 1 x 8:8 |
| 独立电路： | 1 |
| 电压电源： | 单电源 |
| 电源电压： | 4.75 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-LCC（J 形引线） |
| 供应商设备封装： | 44-PLCC（16.59x16.59） |
| 包装： | 管件 |
| 其它名称： | 728985JG 800-1994-5 IDT728985JG-ND |
3
Commercial Temperature Range
IDT728985 Time Slot Interchange
Digital Switch 256 x 256
eight output (TX0-7) serial streams are provided in the IDT728985 device
allowing a complete 256 x 256 channel non-blocking switch matrix to be
constructed. The serial interface clock for the device is 4.096 MHz, as required
in ST-BUS and GCI specifications.
The received serial data is internally converted to parallel by the on chip
serial-to-parallel converters and stored sequentially in a 256-position Data
Memory.Byusinganinternalcounterthatisresetbytheinput8KHzframepulse,
F0i,theincomingserialdatastreamscanbeframedandsequentiallyaddressed.
Dependingonthetypeofinformationtobeswitched,theIDT728985device
can be programmed to perform time slot interchange functions with different
throughput delay capabilities on a per-channel basis. The Variable Delay
mode, most commonly used for voice applications, can be selected ensuring
minimum throughput delay between input and output data. In Constant Delay
mode,usedinmultipleorgroupedchanneldataapplications,theintegrityofthe
information through the switch is maintained.
CONNECTION MEMORY
Data to be output on the serial streams may come from two sources: Data
Memory or Connection Memory. The Connection Memory is split into HIGH
andLOWpartsandisassociatedwithparticularTXoutputstreams. InProcessor
Mode,dataoutputontheTXstreamsistakenfromtheConnectionMemoryLow
and originates from the microprocessor (Figure 2). Where as in Connection
Mode (Figure 1), data is read from Data Memory and originated from the
incomingRXstreams. Datadestinedforaparticularchannelontheserialoutput
stream is read internally during the previous channel time slot to allow time for
memory access and internal parallel-to-serial conversion.
CONNECTION MODE
In Connection Mode, the addresses of input source for all output channels
are stored in the Connection Memory Low. The Connection Memory Low
locationsaremappedtocorresponding8-bitx32-channeloutputs.Thecontents
oftheDataMemoryattheselectedaddressarethentransferredtotheparallel-
to-serialconvertersbeforebeingoutput. Byhavingtheoutputchanneltospecify
theinputchannelthroughtheConnectionMemory,thesameinputchannelcan
be broadcast to several output channels.
PROCESSOR MODE
In Processor Mode the CPU writes data to the Connection Memory Low
locationswhichcorrespondtotheoutputlinkandchannelnumber. Thecontents
of the Connection Memory Low are transferred to the parallel-to-serial
converter one channel before it is to be output and are transmitted each frame
to the output until it is changed by the CPU.
CONTROL
The Connection Memory High bits (Table 4) control the per-channel
functionsavailableintheIDT728985.Outputchannelsareselectedintospecific
modes such as: Processor Mode or Connection mode, Variable or Constant
throughput delay modes, Output Drivers Enabled or in three-state condition.
There is also one bit to control the state of the CCO output pin.
OUTPUT DRIVE ENABLE (ODE)
The ODE pin is the master output three-state control pin. If the ODE input
is held LOW all TDM (Time Division Multiplexed) outputs will be placed in high
impedance regardless Connection Memory High programming. However, if
ODEisHIGH,thecontentsofConnectionMemoryHighcontroltheoutputstate
on a per-channel basis.
SERIAL INTERFACE TIMING
The IDT728985 master clock (
C4i)is4.096MHzsignalallowingserialdata
link configuration at 2.048 Mb/s to be implemented. The IDT728985 can
automatically detect the presence of an input frame pulse, identify the type of
backplanepresentontheserialinterface,andformatthesynchronizationpulse
according to ST-BUS or GCI interface specifications (active HIGH in GCI or
active LOW in ST-BUS). Upon determining the correct interface Connected
to the serial port, the internal timing unit establishes the appropriate serial data
bittransmitandsamplingedges. InST-BUS mode,everysecondfallingedge
of the 4.096 MHz clock marks a boundary and the input data is clocked in by
the rising edge, three quarters of the way into the bit cell. In GCI mode every
second rising edge of the 4.096 MHz clock marks the bit boundary while data
sampling is performed during the falling edge, at three quarters of the bit
boundaries.
DELAY THROUGH THE IDT728985
The transfer of information from the input serial streams to the output serial
streamsresultsinadelaythroughthedevice. ThedelaythroughtheIDT728985
device varies according to the mode selected in the
V/C bit of the Connection
Memory High.
VARIABLE DELAY MODE
The delay in Variable Delay Mode is dependent only on the combination
ofsourceanddestinationontheinputandoutputstreams. Theminimumdelay
achievable in the IDT728985 device is three time slots. In the IDT728985
device, the information that is to be output in the same channel position as the
information is input (position n), relative to frame pulse, will be output in the
following frame (channel n, frame n+1). The same occurs if the input channels
succeeding (n+1, n+2) the channel position as the information is input.
Theinformationswitchedtothethirdtimeslotaftertheinputhasenteredthe
device (for instance, input channel 0 to output channel 3 or input channel 30 to
output channel 1), is always output three channels later.
Any switching configuration that provides three or more time slots between
input and output channels, will have a throughput delay equal to the difference
Figure 2. Processor Mode
Figure 1. Connection Mode
Receive
Serial Data
Streams
5708 drw05
RX
TX
Transmit
Serial Data
Streams
Data
Memory
Connection
Memory
5708 drw06
TX
Microprocessor
Receive
Serial Data
Streams
Transmit
Serial Data
Streams
Data
Memory
Connection
Memory
.UNCTIONAL DESCRIPTION (Cont'd)
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| IDT728985JG8 | 功能描述:IC DGTL SW 256X256 44-PLCC RoHS:是 类别:集成电路 (IC) >> 逻辑 - 信号开关，多路复用器，解码器 系列:7200 标准包装:48 系列:74VHC 类型:多路复用器 电路:4 x 2:1 独立电路:1 输出电流高，低:8mA，8mA 电压电源:单电源 电源电压:2 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
| IDT7290820J | 功能描述:IC DGTL SW 2048X2048 84-PLCC RoHS:否 类别:集成电路 (IC) >> 逻辑 - 信号开关，多路复用器，解码器 系列:7200 标准包装:48 系列:74VHC 类型:多路复用器 电路:4 x 2:1 独立电路:1 输出电流高，低:8mA，8mA 电压电源:单电源 电源电压:2 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
| IDT7290820J8 | 功能描述:IC DGTL SW 2048X2048 84-PLCC RoHS:否 类别:集成电路 (IC) >> 逻辑 - 信号开关，多路复用器，解码器 系列:7200 标准包装:48 系列:74VHC 类型:多路复用器 电路:4 x 2:1 独立电路:1 输出电流高，低:8mA，8mA 电压电源:单电源 电源电压:2 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
| IDT7290820JG | 功能描述:IC DGTL SW 2048X2048 84-PLCC RoHS:是 类别:集成电路 (IC) >> 逻辑 - 信号开关，多路复用器，解码器 系列:7200 标准包装:48 系列:74VHC 类型:多路复用器 电路:4 x 2:1 独立电路:1 输出电流高，低:8mA，8mA 电压电源:单电源 电源电压:2 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:管件 |
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