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参数资料
| 型号： | IDT72V83L20PA8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 11/12页 |
| 文件大小： | 0K |
| 描述： | IC ASYNCH FIFO 1024X18 56TSSOP |
| 标准包装： | 2,000 |
| 系列： | 72V |
| 功能： | 异步 |
| 存储容量： | 18.4K（1K x 18） |
| 数据速率： | 33MHz |
| 访问时间： | 20ns |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 56-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 72V83L20PA8 |
8
COMMERCIAL ANDINDUSTRIAL
TEMPERATURERANGES
IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO
512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9
USAGE MODES:
Width Expansion
Word width may be increased simply by connecting the corresponding
input control signals of multiple FIFOs. Status flags (EF, FF and HF) can be
detectedfromanyoneFIFO. Figure13demonstratesan18-bitwordwidthby
usingthetwoFIFOscontainedintheIDT72V81/72V82/72V83/72V84/72V85s.
Any word width can be attained by adding FIFOs (Figure 13).
Bidirectional Operation
Applications which require data buffering between two systems (each
system capable of Read and Write operations) can be achieved by pairing
IDT72V81/72V82/72V83/72V84/72V85sasshowninFigure16.BothDepth
Expansion and Width Expansion may be used in this mode.
Data Flow-Through
Two types of flow-through modes are permitted, a read flow-through
andwriteflow-throughmode.Forthereadflow-throughmode(Figure17),the
FIFO permits a reading of a single word after writing one word of data into an
empty FIFO. The data is enabled on the bus in (tWEF + tA) ns after the rising
edgeofW,calledthefirstwriteedge,anditremainsonthe busuntiltheRline
israisedfromlow-to-high,afterwhichthebuswouldgointoathree-statemode
aftertRHZns.TheEFlinewouldhaveapulseshowingtemporarydeassertion
and then would be asserted.
In the write flow-through mode (Figure 18), the FIFO permits the writing
of a single word of data immediately after reading one word of data from a
full FIFO. The Rline causes the FFto be deasserted but the Wline being low
causesittobeassertedagaininanticipationofanewdataword.Ontherising
edgeofW,thenewwordisloadedintheFIFO.TheWlinemustbetoggledwhen
FFisnotassertedtowritenewdataintheFIFOandtoincrementthewritepointer.
Compound Expansion
The two expansion techniques described above can be applied together
in a straightforward manner to achieve large FIFO arrays (see Figure 15).
Figure 12. Block Diagram of One 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9 FIFO Used in Single Device Mode
Figure 13. Block Diagram of One 512 x 18, 1,024 x 18, 2,048 x 18, 4,096 x 18 and 8,192 x 18 FIFO Memory Used in Width Expansion Mode
XIA
XIB
9
18
9
18
HFB
HFA
9
WRITE (
W)
FULL FLAG (
FFA)
RESET (
RS)
READ (
R)
EMPTY FLAG (
EFB)
RETRANSMIT (
RT)
DATA OUT (Q)
3966 drw 15
FIFO A
FIFO B
72V81/72V82/72V83
72V84/72V85
DATA
(D)
IN
WRITE (
W)
DATA IN (D)
FULL FLAG (
FF)
RESET (
RS)
9
READ (
R)
9
DATA OUT (Q)
EMPTY FLAG (
EF)
RETRANSMIT (
RT)
EXPANSION IN (
XI)
(
HF)
IDT
72V81
72V82
72V83
72V84
72V85
(HALF-FULL FLAG)
3966 drw 14
FIFO
A or B
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT72V83L20PAGI | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO ASYNCH 1024X18 56TSSOP |
| IDT72V83L20PAGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC FIFO ASYNCH 1024X18 56TSSOP |
| IDT72V841L10PF | 功能描述:IC FIFO SYNC 2048X18 10NS 64QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V841L10PF8 | 功能描述:IC FIFO SYNC 2048X18 10NS 64QFP RoHS:否 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
| IDT72V841L10PFG | 功能描述:IC FIFO SYNC 2048X18 10NS 64QFP RoHS:是 类别:集成电路 (IC) >> 逻辑 - FIFO 系列:72V 标准包装:90 系列:7200 功能:同步 存储容量:288K（16K x 18） 数据速率:100MHz 访问时间:10ns 电源电压:4.5 V ~ 5.5 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:64-LQFP 供应商设备封装:64-TQFP（14x14） 包装:托盘 其它名称:72271LA10PF |
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