参数资料
型号: IDT74ALVCH162825PV8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 总线收发器
英文描述: ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56
封装: SSOP-56
文件页数: 1/6页
文件大小: 66K
代理商: IDT74ALVCH162825PV8
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH162825
3.3VCMOS18-BITBUFFER/DRIVERWITH3-STATEOUTPUTSANDBUS-HOLD
1
APRIL 2000
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2000 Integrated Device Technology, Inc.
DSC-5256/1
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
Balanced Output Drivers: ±12mA
Low switching noise
IDT74ALVCH162825
3.3V CMOS 18-BIT BUFFER/
DRIVER WITH 3-STATE
OUTPUTS AND BUS-HOLD
1
A1
1
OE1
1
OE2
TO EIGH T OTH ER CHAN NELS
1
56
55
1
Y1
2
A1
2
OE1
2
OE2
TO EIGHT OTHER CHANNELS
41
29
28
2
Y1
16
NO
T
RECOMMENDED
FOR
NEW
DESIGNS
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
This 18-bit buffer/driver is built using advanced dual metal CMOS
technology. The ALVCH162825 improves the performance and density of
3-state memory address drivers, clockdrivers, and bus-oriented receivers
and transmitters. The device can be used as two 9-bit buffers or one 18-
bit buffer, and provides true data.
The 3-state control gate is a 2-input AND gate with active-low inputs so
that if either output-enable (OE1 or OE2) input is high, all nine affected
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor, the minimum value of
the resistor is determined by the current-sinking capability of the driver.
The ALVCH162825 has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been designed to drive ±12mA at the designated threshold levels.
The ALVCH162825 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
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