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| 型号： | IDT74ALVCH16374PAG |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封装： | 0.50 MM PITCH, TSSOP-48 |
| 文件页数： | 1/6页 |
| 文件大小： | 72K |
| 代理商： | IDT74ALVCH16374PAG |
INDUSTRIALTEMPERATURERANGE
IDT74ALVCH16374
3.3VCMOS16-BITEDGE-TRIGGEREDD-TYPELATCHWITH3-STATEOUTPUTS
1
APRIL 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-4564/2
FEATURES:
0.5 MICRON CMOS Technology
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
VCC = 2.5V ± 0.2V
CMOS power levels (0.4
μμμμμ W typ. static)
Rail-to-Rail output swing for increased noise margin
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
IDT74ALVCH16374
3.3V CMOS 16-BIT EDGE-
TRIGGERED D-TYPE
LATCH WITH 3-STATE
OUTPUTS AND BUS-HOLD
DESCRIPTION:
This 16-bit edge-triggered D-type flip-flop is built using advanced dual metal
CMOStechnology.TheALVCH16374isparticularlysuitableforimplementing
bufferregisters,I/Oports,bidirectionalbusdrivers,andworkingregisters.Itcan
be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of
the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels at the
data(D)inputs.
OEcanbeusedtoplacetheeightoutputsineitheranormallogic
state(highorlowlogiclevels)orahigh-impedancestate.Inthehigh-impedance
state, the outputs neither load nor drive the bus lines significantly. The high-
impedancestateandtheincreaseddriveprovidethecapabilitytodrivebuslines
without need for interface or pullup components.
OE does not affect internal
operations of the flip-flop. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The ALVCH16374 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining speed
performance.
The ALVCH16374 has “bus-hold” which retains the inputs’ last state
whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputsand
eliminates the need for pull-up/down resistor.
DRIVE FEATURES:
High Output Drivers: ±24mA
Suitable for heavy loads
1
OE
C1
1D
1
D1
47
1
CLK
1
Q1
TO 7 OTHER CHANNELS
2
OE
2
D1
36
2
CLK
2
Q1
TO 7 OTHER CHANNELS
1
48
2
24
25
13
C1
1D
APPLICATIONS:
3.3V high speed systems
3.3V and lower voltage computing systems
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT74ALVCH16501PA | 制造商:Integrated Device Technology Inc 功能描述:Bus Transceiver, Single, 18 Bit, 56 Pin, Plastic, TSSOP |
| IDT74ALVCH16501PAG | 功能描述:IC UNIV BUS TXRX 18BIT 56TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 通用总线函数 系列:74ALVCH 产品变化通告:Product Discontinuation 09/Dec/2010 标准包装:1,500 系列:74AVC 逻辑类型:通用总线驱动器 输入数:- 电路数:18 位 输出电流高，低:12mA，12mA 电源电压:1.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:56-TFSOP（0.240"，6.10mm 宽） 供应商设备封装:56-TSSOP 包装:带卷 (TR) |
| IDT74ALVCH16501PAG8 | 功能描述:TXRX 18BIT UNIV BUS 3ST 56-TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 通用总线函数 系列:74LVC 产品变化通告:Product Discontinuation 09/Dec/2010 标准包装:1,500 系列:74AVC 逻辑类型:通用总线驱动器 输入数:- 电路数:18 位 输出电流高，低:12mA，12mA 电源电压:1.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:56-TFSOP（0.240"，6.10mm 宽） 供应商设备封装:56-TSSOP 包装:带卷 (TR) |
| IDT74ALVCH16501PVG | 功能描述:IC UNIV BUS TXRX 18BIT 56SSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 通用总线函数 系列:74ALVCH 产品变化通告:Product Discontinuation 09/Dec/2010 标准包装:1,500 系列:74AVC 逻辑类型:通用总线驱动器 输入数:- 电路数:18 位 输出电流高，低:12mA，12mA 电源电压:1.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:56-TFSOP（0.240"，6.10mm 宽） 供应商设备封装:56-TSSOP 包装:带卷 (TR) |
| IDT74ALVCH16501PVG8 | 功能描述:IC UNIV BUS TXRX 18BIT 56SSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 通用总线函数 系列:74ALVCH 产品变化通告:Product Discontinuation 09/Dec/2010 标准包装:1,500 系列:74AVC 逻辑类型:通用总线驱动器 输入数:- 电路数:18 位 输出电流高，低:12mA，12mA 电源电压:1.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:56-TFSOP（0.240"，6.10mm 宽） 供应商设备封装:56-TSSOP 包装:带卷 (TR) |
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