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| 型号： | IDT74FCT162H501ETEG |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDFP56 |
| 封装： | 0.635 MM PITCH, CERPACK-56 |
| 文件页数： | 1/7页 |
| 文件大小： | 124K |
| 代理商： | IDT74FCT162H501ETEG |
1
IDT54/74FCT162H501AT/CT/ET
FASTCMOS18-BITREGISTEREDTRANSCEIVER
MILITARYANDCOMMERCIALTEMPERATURERANGES
AUGUST 1999
1999
Integrated Device Technology, Inc.
DSC-5434/-
c
IDT54/74FCT162H501AT/CT/ET
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
18-BIT REGISTERED
TRANSCEIVER
DESCRIPTION:
The FCT162H501AT/CT/ET 18-bit registered transceivers are built
using advanced dual metal CMOS technology. These high-speed, low-
power 18-bit registered bus transceivers combine D-type latches and D-
type flip-flops to allow data flow in transparent, latched and clocked modes.
Data flow in each direction is controlled by output-enable (OEAB and
OEBA), latch enable (LEAB and LEBA) and clock (CLKAB and CLKBA)
inputs. For A-to-B data flow, the device operates in transparent mode when
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at
a high or low logic level. If LEAB is low, the A bus data is stored in the latch/
flip-flop on the low-to-high transition of CLKAB. OEAB is the output enable
for the B port. Data flow from the B port to the A port is similar but requires
using
OEBA, LEBA and CLKBA. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for improved noise
margin.
The FCT162H501AT/CT/ET has "Bus Hold" which retains the input's
last state whenever the input goes to high impedance. This prevents
"floating" inputs and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
OEBA
CLKBA
LEBA
OEAB
CLKAB
LEAB
B1
A1
C
D
C
D
C
TO 17 OTHER CHANNELS
1
30
28
27
55
2
3
54
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage ≤ 1A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP
and 25 mil pitch CERPACK packages
Extended commercial range of -40°C to +85°C
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull up resistors
相关PDF资料 |
PDF描述 |
|---|---|
| IDT74FCT162H501ATEG | FCT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CDFP56 |
| IDT74FCT162H952BTPV | FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| IDT74FCT163244CE | FCT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, CDFP48 |
| IDT54FCT163244EB | FCT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, CDFP48 |
| IDT74FCT163244CPAG8 | FCT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 |
相关代理商/技术参数 |
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| IDT74FCT163244APAG | 功能描述:IC BUFF DVR 16BIT N-INV 48TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 缓冲器，驱动器，接收器，收发器 系列:74FCT 标准包装:2,000 系列:74LVCH 逻辑类型:缓冲器/线路驱动器，非反相 元件数:2 每个元件的位元数:4 输出电流高，低:24mA，24mA 电源电压:1.65 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:20-SOIC（0.295"，7.50mm 宽） 供应商设备封装:20-SOIC 包装:带卷 (TR) |
| IDT74FCT163244APAG8 | 功能描述:IC BUFF DVR 16BIT N-INV 48TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 缓冲器，驱动器，接收器，收发器 系列:74FCT 标准包装:47 系列:74LVX 逻辑类型:缓冲器/线路驱动器，非反相 元件数:4 每个元件的位元数:1 输出电流高，低:4mA，4mA 电源电压:2 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-SOIC（0.209"，5.30mm 宽） 供应商设备封装:14-SOIC 包装:管件 |
| IDT74FCT163244APFG | 功能描述:IC BUFF DVR 16BIT N-INV 48TVSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 缓冲器，驱动器，接收器，收发器 系列:74FCT 标准包装:47 系列:74LVX 逻辑类型:缓冲器/线路驱动器，非反相 元件数:4 每个元件的位元数:1 输出电流高，低:4mA，4mA 电源电压:2 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-SOIC（0.209"，5.30mm 宽） 供应商设备封装:14-SOIC 包装:管件 |
| IDT74FCT163244APFG8 | 功能描述:IC BUFF DVR 16BIT N-INV 48TVSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 缓冲器，驱动器，接收器，收发器 系列:74FCT 标准包装:47 系列:74LVX 逻辑类型:缓冲器/线路驱动器，非反相 元件数:4 每个元件的位元数:1 输出电流高，低:4mA，4mA 电源电压:2 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:14-SOIC（0.209"，5.30mm 宽） 供应商设备封装:14-SOIC 包装:管件 |
| IDT74FCT163244APV | 制造商:Integrated Device Technology Inc 功能描述: |
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