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参数资料
| 型号： | IDT74FCT16646ATPV8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封装： | SSOP-56 |
| 文件页数： | 6/8页 |
| 文件大小： | 96K |
| 代理商： | IDT74FCT16646ATPV8 |
6
INDUSTRIALTEMPERATURERANGE
IDT74FCT16646AT/CT/ET
FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER (3-STATE)
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16646AT
FCT16646CT
FCT16646ET
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
Propagation Delay
CL = 50pF
2
6.3
1.5
5.4
1.5
3.8
ns
tPHL
Bus to Bus
RL = 500
tPZH
Output Enable Time
2
9.8
1.5
7.8
1.5
4.8
ns
tPZL
xDIR or xOE to Bus
tPHZ
Output Disable Time
2
6.3
1.5
6.3
1.5
4
ns
tPLZ
xDIR or xOE to Bus
tPLH
Propagation Delay
2
6.3
1.5
5.7
1.5
3.8
ns
tPHL
Clock to Bus
tPLH
Propagation Delay
2
7.7
1.5
6.2
1.5
4.2
ns
tPHL
xSBA or xSAB to Bus
tSU
Set-up Time HIGH or LOW, Bus to Clock
2
—
2
—
2
—
ns
tH
Hold Time HIGH or LOW, Bus to Clock
1.5
—
1.5
—
0
—
ns
tW
Clock Pulse Width HIGH or LOW
5
—
5
—
3(4)
—ns
tSK(o)
Output Skew(3)
—
0.5
—
0.5
—
0.5
ns
相关PDF资料 |
PDF描述 |
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| IDT74FCT16646ATPA8 | FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| IDT74FCT16652TPV8 | FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| IDT74FCT16823ATPA8 | FCT SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDT74FCT16646ATV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16646TPV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16652TPA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16652TPV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16823ATPV | 制造商:INT_DEV_TECH 功能描述: |
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