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参数资料
| 型号： | IDT74FCT16652CTPAG |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封装： | TSSOP-56 |
| 文件页数： | 7/9页 |
| 文件大小： | 102K |
| 代理商： | IDT74FCT16652CTPAG |
7
IDT74FCT16652AT/CT
FASTCMOS16-BITBUSTRANSCEIVER/REGISTER
INDUSTRIALTEMPERATURERANGE
74FCT16652AT
74FCT16652CT
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
PropagationDelay
CL = 50pF
2
6.3
1.5
3.9
ns
tPHL
Bus to Bus
RL = 500
tPZH
OutputEnableTime
2
9.8
1.5
4.8
ns
tPZL
xOEAB or xOEBA to Bus
tPHZ
OutputDisableTime
2
6.3
1.5
4.4
ns
tPLZ
xOEAB or xOEBA to Bus
tPLH
PropagationDelay
2
6.3
1.5
4.1
ns
tPHL
Clock to Bus
tPLH
PropagationDelay
2
7.7
1.5
4.2
ns
tPHL
xSBA or xSAB to Bus
tSU
Set-Up Time, HIGH or LOW
2
—
2
—
ns
Bus to Clock
tH
Hold Time, HIGH or LOW
1.5
—
0
—
ns
Bus to Clock
tW
Clock Pulse Width, HIGH or LOW
5
—
3
—
ns
tSK(o)
OutputSkew(3)
—
0.5
—
0.5
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
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相关代理商/技术参数 |
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| IDT74FCT16652TPA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16652TPV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16823ATPV | 制造商:INT_DEV_TECH 功能描述: |
| IDT74FCT16823CTPV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16823ETPA | 制造商:Integrated Device Technology Inc 功能描述: |
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