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参数资料
| 型号： | IDT74FCT2646ATSO8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封装： | SOIC-24 |
| 文件页数： | 7/8页 |
| 文件大小： | 198K |
| 代理商： | IDT74FCT2646ATSO8 |
INDUSTRIALTEMPERATURERANGE
IDT74FCT2646AT/CT
FASTCMOSOCTALTRANSCEIVER/REGISTER(3-STATE)
7
Pulse
Generator
R T
D.U.T.
V CC
V IN
C L
V OUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
IN PU T
TIM IN G
IN PU T
ASYNCHRON OUS C ONTROL
PRES ET
CLEA R
ETC.
SYNCHRONOUS CONTRO L
tSU
tH
tREM
tSU
tH
HIGH-LOW -HIG H
PULSE
LO W -H IGH -LOW
PULSE
tW
1.5V
SAM E PHA SE
IN PU T TR ANSITIO N
3V
1.5V
0V
1.5V
VOH
tPLH
OU TPUT
OPPOS ITE PHASE
IN PU T TR ANSITIO N
3V
1.5V
0V
tPLH
tPHL
VOL
CO NTR OL
IN PU T
3V
1.5V
0V
3.5V
0V
OU TPUT
NO RM ALLY
LO W
OU TPUT
NO RM ALLY
HIGH
SW ITC H
CLOSE D
SW ITC H
OPEN
VOL
0.3V
tPLZ
tPZL
tPZH
tPHZ
3.5V
0V
1.5V
ENABLE
DISA BLE
VOH
PRES ET
CLEA R
CLOC K ENABLE
ETC.
Octal lin k
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-Up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
SWITCH POSITION
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
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