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参数资料
| 型号： | IDT74LVC16Z646APF8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封装： | TVSOP-56 |
| 文件页数： | 1/7页 |
| 文件大小： | 112K |
| 代理商： | IDT74LVC16Z646APF8 |
INDUSTRIALTEMPERATURERANGE
IDT74LVC16Z646A
3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER
1
AUGUST 1999
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
1999 Integrated Device Technology, Inc.
DSC-5165/1
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
DRIVE FEATURES:
High Output Drivers: ±24mA
Reduced system switching noise
IDT74LVC16Z646A
DESCRIPTION:
The LVC16Z646A 16-bit bus transceiver/register is built using advanced
dual metal CMOS technology. This high-speed, low power device is
organized as two independent 8-bit D-type transceivers with 3-state D-type
registers. The control circuitry is organized for multiplexed transmission of
data between the A bus and B bus either directly or from the internal storage
registers. Each 8-bit transceiver/register features direction control (DIR),
over-riding Output Enable control (OE) and Select lines (SAB and SBA) to
select either real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data bus, or both,
can be stored in the internal registers by the low-to-high transitions at the
appropriate clock pins. Flow-through organization of signal pins simplifies
layout. All inputs are designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVC16Z646A has been designed with a ±24mA output driver. The
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
3.3V CMOS 16-BIT BUS
TRANSCEIVER/REGISTER
WITH ZERO HOLD TIME, 3-STATE
OUTPUTS, 5 VOLT TOLERANT I/O
TO SEVEN OTHER CHANNELS
1
B1
B REG
1D
C1
A REG
1
A1
1
SAB
1
CLKAB
1
SBA
1
OE
1
CLKBA
TO SEVEN OTHER CHANNELS
2
B1
B REG
A REG
2
A1
2
SAB
2
CLKAB
2
SBA
2
OE
2
CLKBA
2
DIR
1
DIR
56
1
55
54
2
3
5
29
28
30
31
27
26
15
52
42
1D
C1
1D
C1
1D
C1
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