参数资料
型号: IDT74LVC273AQG8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 锁存器
英文描述: LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
封装: QSOP-20
文件页数: 2/6页
文件大小: 60K
代理商: IDT74LVC273AQG8
INDUSTRIALTEMPERATURERANGE
2
IDT74LVC273A
3.3VCMOSOCTALD-TYPEFLIP-FLOPWITHRESET
NOTE:
1. As applicable to the device type.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
5.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA= +25°C, F = 1.0MHz)
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1
VCC
GND
CLR
O0
D0
D1
O1
O2
D2
D3
CP
O3
O7
D7
D6
O6
O5
D5
D4
O4
PIN CONFIGURATION
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
FUNCTION TABLE (1)
Inputs
Internal
Outputs
CLR
CP
Dx
Q Value
Ox
Function
L
X
L
ClearRegister
H
L
LoadInputData
H
H
LoadInputData
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH Transition
PIN DESCRIPTION
Pin Names
Description
CLR
Clear Input
C P
Clock Input
Ox
DataOutputs
Dx
DataInputs
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