参数资料
型号: IDT74LVC544APY8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 总线收发器
英文描述: LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24
封装: 0.65 MM PITCH, SSOP-24
文件页数: 1/6页
文件大小: 130K
代理商: IDT74LVC544APY8
1
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVC544A
3.3VCMOSOCTALREGISTEREDTRANSCEIVER
APRIL 1999
1999
Integrated Device Technology, Inc.
DSC-4650/-
c
IDT74LVC544A
ADVANCE
INFORMATION
EXTENDED COMMERCIAL TEMPERATURE RANGE
DESCRIPTION:
The LVC544A device contains two sets of D-type latches for temporary
storage of data flowing in either direction. Separate latch-enable (
LEAB
or
LEBA) and output-enable (OEAB or OEBA) inputs are provided for each
register to permit independent control in either direction of data flow.
The A-to-B enable (
CEAB) input must be low to enter data from A or to
output data to B. If
CEAB is low and LEAB is low, the A-to-B latches are
transparent; a subsequent low-to-high transition of
LEAB places the A
latches in the storage mode. With
CEAB and OEAB both low, the 3-state
B outputs are active and reflect the inverted data present at the output of
the A latches. Data flow from B to A is similar to that of A to B, but uses
CEBA,
LEBA, and OEBA.
To ensure the high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
The LVC544A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
1.27mm pitch SOIC, 0.65mm pitch SSOP,
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages
Extended commercial range of – 40°C to +85°C
–VCC = 3.3V ±0.3V, Normal Range
–VCC = 2.3V to 3.6V, Extended Range
CMOS power levels (0.4 W typ. static)
Rail-to-Rail output swing for increased noise margin
All inputs, outputs and I/O are 5 Volt tolerant
Supports hot insertion
3.3V CMOS OCTAL
REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
Functional Block Diagram
TO SEVE N O THE R C HAN NELS
A1
B1
C1
1
D
C1
1
D
OEB A
CEB A
LEB A
OEA B
CEA B
LEA B
2
23
1
13
11
14
3
22
Drive Features for LVC544A:
High Output Drivers:
±24mA
Reduced system switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
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