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参数资料
| 型号： | IDT74LVC573APY8 |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封装： | 0.65 MM PITCH, SSOP-20 |
| 文件页数： | 1/6页 |
| 文件大小： | 108K |
| 代理商： | IDT74LVC573APY8 |
1
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVC573A
3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH
APRIL 1999
1999
Integrated Device Technology, Inc.
DSC-4627/-
c
IDT74LVC573A
ADVANCE
INFORMATION
EXTENDED COMMERCIAL TEMPERATURE RANGE
DESCRIPTION:
The LVC573A octal transparent D-type latch is built using advanced dual
metal CMOS technology. The device features 3-state outputs designed
specifically for driving highly capacitive or relatively low-impedance loads,
and is particularly suitable for implementing buffer registers, input-output (I/
O) ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs follow the data
(D) inputs. When LE is taken low, the Q outputs are latched at the logic levels
at the D inputs.
A buffered output-enable (
OE) input can be used to place the eight
outputs in either a normal logic state (high or low logic levels) or a high-
impedance state. In the high-impedance state, the outputs neither load nor
drive the bus lines significantly. The high-impedance state and increased
drive provide the capability to drive bus lines without interface or pullup
components.
OEdoesnotaffecttheinternaloperationsofthelatch.Olddata
can be retained or new data can be entered while the outputs are in the
high-impedance state.
The LVC573A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
FEATURES:
–
0.5 MICRON CMOS Technology
–
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
–
1.27mm pitch SOIC, 0.65mm pitch SSOP,
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages
–
Extended commercial range of – 40°C to +85°C
–VCC = 3.3V ±0.3V, Normal Range
–VCC = 2.3V to 3.6V, Extended Range
–
CMOS power levels (0.4 W typ. static)
–
Rail-to-Rail output swing for increased noise margin
–
All inputs, outputs and I/O are 5 Volt tolerant
–
Supports hot insertion
3.3V CMOS OCTAL
TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
AND 5 VOLT TOLERANT I/O
Functional Block Diagram
OE
C1
LE
1
D
TO SEVEN O TH ER C HANN ELS
1
11
2
19
1
D
1
Q
Drive Features for LVC573A:
–
High Output Drivers:
±24mA
–
Reduced system switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
相关PDF资料 |
PDF描述 |
|---|---|
| IDT74LVC573APG8 | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| IDT74LVC574APY8 | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| IDT74LVC623AQ8 | LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20 |
| IDT74LVC652ASO8 | LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| IDT74LVC74AP | LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
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| IDT74LVCC3245APGG | 功能描述:IC BUS TRANSCVR 3-ST 8B 24TSSOP RoHS:是 类别:集成电路 (IC) >> 逻辑 - 变换器 系列:74LVCC 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:100 系列:- 逻辑功能:变换器，双向 位数:2 输入类型:CMOS 输出类型:CMOS 数据速率:16Mbps 通道数:2 输出/通道数目:1 差分 - 输入:输出:无/无 传输延迟（最大）:15ns 电源电压:1.65 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:10-UFQFN 供应商设备封装:10-UTQFN（1.4x1.8） 包装:管件 |
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