参数资料
型号: IDT74LVC74APG
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 锁存器
英文描述: LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封装: TSSOP-14
文件页数: 2/6页
文件大小: 75K
代理商: IDT74LVC74APG
INDUSTRIALTEMPERATURERANGE
2
IDT74LVC74A
3.3VCMOSDUALPOSITIVE-EDGE-TRIGGEREDD-TYPEFLIP-FLOP
NOTE:
1. As applicable to the device type.
Symbol
Parameter
(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output Capacitance
VOUT = 0V
5.5
8
pF
CI/O
I/O Port Capacitance
VIN = 0V
6.5
8
pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol
Description
Max
Unit
VTERM
Terminal Voltage with Respect to GND
–0.5 to +6.5
V
TSTG
Storage Temperature
–65 to +150
° C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
–50
mA
IOK
VI < 0 or VO < 0
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
TSSOP
TOP VIEW
PIN CONFIGURATION
PIN DESCRIPTION
Pin Names
Description
x
PRE
Preset Inputs (Active LOW)
x
CLR
Clear Inputs (Active LOW)
xCLK
Clock Inputs
xD
Data Inputs
xQ, x
Q
Data Outputs
FUNCTION TABLE(1)
Inputs
Outputs
xPRE
xCLR
xCLK
xD
xQ
LH
X
H
L
HL
X
L
H
LL
X
H(2)
HH
HH
L
HH
LL
H
HH
L
X
Q(3)
Q(4)
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH transition
2. This configuration is unstable; that is, it does not persist when either
PRE or CLR
returns to its inactive (HIGH) level.
3. Level of Q before the indicated steady-state input conditions were established.
4. Complement of Q or level of
Q before the indicated steady-state input conditions
were established.
2
3
14
1
CLR
VCC
5
6
4
GND
7
13
12
10
9
11
8
1
D
1
CLK
1
PRE
1
Q
1
Q
2
CLR
2
D
2
CLK
2
PRE
2
Q
2
Q
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