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参数资料
| 型号： | IDT74LVCH646ASO |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封装： | SOIC-24 |
| 文件页数： | 2/7页 |
| 文件大小： | 96K |
| 代理商： | IDT74LVCH646ASO |
2
EXTENDEDCOMMERCIALTEMPERATURERANGE
IDT74LVCH646A
3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH Transition
2. The data output functions may be enabled or disabled by various signals at the
OE or DIR inputs. Data input functions are always enabled; i.e., data
at the bus pins willl be stored on every LOW-to-HIGH transition on the clock inputs.
2
3
1V CC
20
19
18
B 2
B 1
B 3
SBA
15
A 7
16
9
10
B 4
23
22
24
21
17
5
6
A 4
7
A 2
A 3
4
A 1
SO 24-2
SO 24-7
SO 24-8
SO 24-9
8
A 5
13
CL KB A
14
11
12
GN D
CL KA B
SA B
DIR
A 6
A 8
OE
B 5
B 6
B 7
B 8
PIN DESCRIPTION
Pin Names
Description
Ax
Data Register A Inputs (1)
Data Register B Outputs
Bx
Data Register B Inputs (1)
Data Register A Outputs
CLKAB, CLKBA
Clock Pulse Inputs
SAB, SBA
Output Data Source Select Inputs
OE
Output-enable Input
DIR
Direction-control Input
NOTE:
1. These pins have “Bus-hold”. All other pins are standard inputs,
outputs, or I/Os.
FUNCTION TABLE (1)
Inputs
Data I/O
OE
DIR
CLKAB
CLKBA
SAB
SBA
A1-A8
B1-B8
Operation or Function
X
↑
X
↑
X
Input
Unspecified(2)
Input
Store A, B unspecified(2)
Store B, A unspecified(2)
H
X
↑
H or L
↑
H or L
X
Input
Input disabled
Input
Input disabled
Store A and B data
Isolation, hold storage
L
X
H or L
X
L
H
Output
Input
Real-time B data to A bus
Stored B data to A bus
L
H
X
H or L
X
L
H
X
Input
Output
Real Time A data to B bus
Stored A data to B bus
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
Description
Max.
Unit
VTERM
Terminal Voltage with Respect to GND
– 0.5 to +6.5
V
TSTG
Storage Temperature
– 65 to +150
°C
IOUT
DC Output Current
– 50 to +50
mA
IIK
IOK
Continuous Clamp Current,
VI < 0 or VO < 0
– 50
mA
ICC
ISS
Continuous Current through
each VCC or GND
±100
mA
8LVC
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device.
This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied.
Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
CAPACITANCE (TA = +25°C, f = 1.0MHZ)
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
4.5
6
pF
COUT
Output
Capacitance
VOUT = 0V
5.5
8
pF
CI/O
I/O Port
Capacitance
VIN = 0V
6.5
8
pF
8LVC Link
NOTE:
1. As applicable to the device type.
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