参数资料
型号: IDT74LVCHR16501APV
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 总线收发器
英文描述: LVC/LCX/Z SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封装: SSOP-56
文件页数: 1/7页
文件大小: 82K
代理商: IDT74LVCHR16501APV
INDUSTRIALTEMPERATURERANGE
IDT74LVCHR16501A
3.3V CMOS 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
1
JUNE 2006
INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
2006 Integrated Device Technology, Inc.
DSC-4893/4
FEATURES:
Typical tSK(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
VCC = 3.3V ± 0.3V, Normal Range
VCC = 2.7V to 3.6V, Extended Range
CMOS power levels (0.4
μμμμμ W typ. static)
All inputs, outputs, and I/O are 5V tolerant
Supports hot insertion
Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
Balanced Output Drivers: ±12mA
Low switching noise
APPLICATIONS:
5V and 3.3V mixed voltage systems
Data communication and telecommunication systems
IDT74LVCHR16501A
DESCRIPTION:
The LVCHR16501A 18-bit registered transceiver is built using advanced
dual metal CMOS technology. This high-speed, low power 18-bit registered
bus transceiver combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched, and clocked modes. Data flow in each direction
is controlled by output-enable (OEAB and
OEBA), latch enable (LEAB and
LEBA) and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the
device operates in transparent mode when LEAB is high. When LEAB is low,
the A data is latched if CLKAB is held at a high or low logic level. If LEAB
is low, the A bus data is stored in the latch/flip-flop on the low-to-high transition
of CLKAB. OEAB performs the output enable function on the B port. Data
flow from B port to A port is similar but requires using
OEBA, LEBA and
CLKBA. Flow-through organization of signal pins simplifies layout. All inputs
are designed with hysteresis for improved noise margin.
The LVCHR16501A has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. This
driver has been developed to drive ±12mA at the designated thresholds.
The LVCHR16501A has “bus-hold” which retains the inputs’ last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
3.3V CMOS 18-BIT
REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
B1
C
D
C
D
A1
LEAB
CLKAB
OEBA
LEBA
CLKBA
OEAB
TO 17 OTHER CHANNELS
C
D
C
D
1
30
28
27
55
2
3
54
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