参数资料
型号: IDT79RC32V334-150BB9
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 150 MHz, RISC MICROCONTROLLER, PBGA256
封装: PLASTIC, BGA-256
文件页数: 1/30页
文件大小: 652K
代理商: IDT79RC32V334-150BB9
1 of 30
November 1, 2001
2001 Integrated Device Technology, Inc.
DSC 5701
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Features
x
RC32300 32-bit Microprocessor
– Up to 150 MHz operation
– Enhanced MIPS-II Instruction Set Architecture (ISA)
– Cache prefetch instruction
– Conditional move instruction
– DSP instructions
– Supports big or little endian operation
– MMU with 32 page TLB
– 8kB Instruction Cache, 2-way set associative
– 2kB Data Cache, 2-way set associative
– Cache locking per line
– Programmable on a page basis to implement a write-through
no write allocate, write-through write allocate, or write-back
algorithms for cache management
– Compatible with a wide variety of operating systems
x
Local Bus Interface
– Up to 75 MHz operation
– 26-bit address bus
– 32-bit data bus
– Direct control of local memory and peripherals
– Programmable system watch-dog timers
– Big or little endian support
x
Interrupt Controller simplifies exception management
x
Four general purpose 32-bit timer/counters
x
Programmable I/O (PIO)
– Input/Output/Interrupt source
– Individually programmable
x
SDRAM Controller (32-bit memory only)
– 4 banks, non-interleaved
– Up to 256MB total SDRAM memory supported
– Implements full, direct control of discrete, SODIMM, or DIMM
memories
– Supports 16Mb through 256Mb SDRAM device depths
– Automatic refresh generation
x
Serial Peripheral Interface (SPI) master mode interface
x
UART Interface
– Two 16550 compatible UARTs
– Baud rate support up to 1.5M
– Modem control signals available on one channel
x
Memory & Peripheral Controller
– 6 banks, up to 64MB per bank
– Supports 8-,16-, and 32-bit interfaces
– Supports Flash ROM, SRAM, dual-port memory, and
peripheral devices
– Supports external wait-state generation
– 8-bit boot PROM support
– Flexible I/O timing protocols
Block Diagram
Figure 1 RC32334 Block Diagram
Local
Memory/IO
Control
Interrupt Control
DMA Control
Dual UART
32-bit Timers
SPI Control
Programmable I/O
PCI Bridge
IDT
Peripheral
Bus
RISCore32300
Enhanced MIPS-II ISA
Integer CPU
RC5000
Compatible
CP0
32-page
TLB
EJTAG
In-Circuit Emulator Interface
2kB
2-set, Lockable
Data Cache
8kB
2-set
Lockable
Instr. Cache
IPBus
Bridge
SDRAM
Control
79RC32334
RISCoreTM32300 Family
Integrated Processor
相关PDF资料
PDF描述
IDT79RC32V334-133BBI9 32-BIT, 133 MHz, RISC MICROCONTROLLER, PBGA256
IDT79RC32V364-100DAGI 32-BIT, 100 MHz, RISC PROCESSOR, PQFP144
IDT79RC64T574250DZG 64-BIT, 250 MHz, RISC PROCESSOR, PQFP128
IDT79RC64T575-200DPG 64-BIT, 200 MHz, RISC PROCESSOR, PQFP208
IDT79RC64T575-250DP 64-BIT, 250 MHz, RISC PROCESSOR, PQFP208
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