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参数资料
| 型号： | IDTCSPT857DPAG8 |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 13/15页 |
| 文件大小： | 0K |
| 描述： | IC PLL CLK DVR SDRAM 48-TSSOP |
| 标准包装： | 2,000 |
| 类型： | 时钟缓冲器/驱动器，零延迟缓冲器，多路复用器 |
| PLL： | 是 |
| 主要目的： | 存储器，DDR，SDRAM |
| 输入： | 时钟 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:10 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 220MHz |
| 电源电压： | 2.3 V ~ 2.7 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 48-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | CSPT857DPAG8 |
7
IDTCSPT857D
2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
COMMERCIALTEMPERATURERANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR PC3200
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
VIK
Input Clamp Voltage (All Inputs)
VDDQ = 2.5V, II = -18mA
– 1.2
V
VIL(dc)
Static Input LOW Voltage
PWRDWN
– 0.3
0.7
V
VIH(dc)
Static Input HIGH Voltage
PWRDWN
1.7
VDDQ + 0.3
VIL(ac)
Dynamic Input LOW Voltage
CLK,
CLK, FBIN, FBIN
0.7
V
VIH(ac)
Dynamic Input HIGH Voltage
CLK,
CLK, FBIN, FBIN
1.7
VDDQ
VOL
Output LOW Voltage
AVDD/VDDQ = Min., IOL = 100
μA
0.1
V
AVDD/VDDQ = Min., IOL = 12mA
0.6
VOH
Output HIGH Voltage
AVDD/VDDQ = Min., IOH = -100
μAVDDQ – 0.1
V
AVDD/VDDQ = Min., IOH = -12mA
1.7
VIX
Input Differential Cross Voltage
VDDQ/2 – 0.2
VDDQ/2 + 0.2
V
VID(DC)(1)
DC Input Differential Voltage
0.36
VDDQ + 0.6
V
VID(AC)(1)
AC Input Differential Voltage
0.7
VDDQ + 0.6
V
IIN
InputCurrent
VDDQ = 2.7V, VI = 0V to 2.7V
±10
μA
IDDPD
Power-Down Current on VDDQ and AVDD
AVDD/VDDQ = Max., CLK = 0MHz or
PWRDWN = L
100
200
μA
IDDQ
Dynamic Power Supply Current on VDDQ
AVDD/VDDQ = Max., CLK = 200MHz, 120
Ω/14pF
320
360
mA
AVDD/VDDQ = Max., CLK = 200MHz, 120
Ω/14pF
250
300
IADD
Dynamic Power Supply Current on AVDD
AVDD/VDDQ = Max., CLK = 200MHz
12
mA
NOTE:
1. VID is the magnitude of the difference between the input level on CLK and the input level on
CLK.
TIMING REQUIREMENTS FOR PC3200
Symbol
Parameter
Min.
Max.
Unit
fCLK
Operating Clock Frequency(1,2)
60
220
MHz
Application Clock Frequency(1,3)
60
220
MHz
tDC
Input Clock Duty Cycle
40
60
%
tL
StabilizationTime(4)
100
μs
NOTES:
1.
The PLL will track a spread spectrum clock input.
2.
Operating clock frequency is the range over which the PLL will lock, but may not meet all timing specifications.
3.
Application clock frequency is the range over which timing specifications apply.
4.
Stabilization time is the time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference signal after power up.
TIMING REQUIREMENTS FOR PC1600 - PC2700
Symbol
Parameter
Min.
Max.
Unit
fCLK
Operating Clock Frequency(1,2)
60
200
MHz
Application Clock Frequency(1,3)
60
200
MHz
tDC
Input Clock Duty Cycle
40
60
%
tL
StabilizationTime(4)
100
μs
NOTES:
1.
The PLL will track a spread spectrum clock input.
2.
Operating clock frequency is the range over which the PLL will lock, but may not meet all timing specifications.
3.
Application clock frequency is the range over which timing specifications apply.
4.
Stabilization time is the time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference signal after power up.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDTCSPT857DPAGI | 功能描述:IC PLL CLK DVR SDRAM 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:1,500 系列:- 类型:时钟缓冲器/驱动器 PLL:是 主要目的:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 电源电压:3.3V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-SSOP（0.209"，5.30mm 宽） 供应商设备封装:28-SSOP 包装:带卷 (TR) 其它名称:93786AFT |
| IDTCSPT857DPAGI8 | 功能描述:IC PLL CLK DVR SDRAM 48-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 专用 系列:- 标准包装:28 系列:- 类型:时钟/频率发生器 PLL:是 主要目的:Intel CPU 服务器 输入:时钟 输出:LVCMOS 电路数:1 比率 - 输入:输出:3:22 差分 - 输入:输出:无/是 频率 - 最大:400MHz 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 85°C 安装类型:表面贴装 封装/外壳:64-TFSOP （0.240"，6.10mm 宽） 供应商设备封装:64-TSSOP 包装:管件 |
| IDTCSPT857DPAI | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER |
| IDTCSPT857DPF | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER |
| IDTCSPT857DPFI | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER |
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