参数资料
型号: IDTQS29FCT2052ATQ8
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 总线收发器
英文描述: FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
封装: QSOP-24
文件页数: 5/6页
文件大小: 108K
代理商: IDTQS29FCT2052ATQ8
5
IDTQS29FCT2052AT/BT/CT
HIGH-SPEEDCMOS8-BITBUSINTERFACEREGISTERTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
Pulse
Generator
R T
D.U.T.
VCC
VIN
C L
VOUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
IN PUT
TIM ING
IN PUT
ASYNC H R ON OU S C ON TR OL
PR ES ET
CLEA R
ETC .
SYN CH RO NOUS CONTROL
tSU
tH
tREM
tSU
tH
H IGH -LO W -H IGH
PU LS E
LOW -H IGH -LO W
PU LS E
tW
1.5V
SAM E PH ASE
IN PUT TR ANSITIO N
3V
1.5V
0V
1.5V
VOH
tPLH
OU TPU T
OPPO SIT E PH ASE
IN PUT TR ANSITIO N
3V
1.5V
0V
tPLH
tPHL
VOL
CONTROL
IN PUT
3V
1.5V
0V
3.5V
0V
OU TPU T
NORMALLY
LOW
OU TPU T
NORMALLY
HIGH
SW IT CH
CLO SED
SW IT CH
OPEN
VOL
0.3V
tPLZ
tPZL
tPZH
tPHZ
3.5V
0V
1.5V
EN ABLE
D ISABLE
VOH
PR ES ET
CLEA R
C LO CK EN ABL E
ETC .
FC T L lin k
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
PULSE WIDTH
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
FCTL
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤ 10MHz; Zo ≤ 50; tF ≤ 2.5ns;
tR
≤ 2.5ns.
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