参数资料
型号: IDTQS32XVH245Q2G
厂商: INTEGRATED DEVICE TECHNOLOGY INC
元件分类: 通用总线功能
英文描述: 2.5V / 3.3V 16-BIT HIGH BANDWIDTH BUS SWITCH
中文描述: CBT/FST/QS/5C/B SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO40
封装: QVSOP-40
文件页数: 7/8页
文件大小: 83K
代理商: IDTQS32XVH245Q2G
7
INDUSTRIAL TEMPERATURE RANGE
IDTQS32XVH245
2.5V / 3.3V 16-BIT HIGH BANDWIDTH BUS SWITCH
TEST CIRCUITS AND WAV EFORMS
Open
V
LOAD
GND
V
CC
Pulse
Generator
D.U.T.
500
500
C
L
R
T
V
IN
V
OUT
(1, 2)
SAME PHASE
INPUT TRANSITION
OPPOSITE PHASE
INPUT TRANSITION
0V
V
OH
V
T
0V
V
OL
t
PLH
t
PHL
t
PHL
t
PLH
OUTPUT
V
IH
V
T
V
IH
V
T
CONTROL
INPUT
t
PLZ
0V
OUTPUT
NORMALLY
LOW
t
PZH
0V
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
SWITCH
OPEN
t
PHZ
0V
V
OL +
V
LZ
V
OL
V
OH
V
OH -
V
HZ
V
T
V
T
t
PZL
V
LOAD/2
V
LOAD/2
V
IH
V
T
TEST CONDITIONS
Symbol
V
CC
(1)
= 3.3V ± 0.3V
V
CC
(2)
= 2.5V ± 0.2V
Unit
V
LOAD
6
2 x Vcc
V
V
IH
3
Vcc
V
V
T
1.5
V
CC
/2
V
V
LZ
300
150
mV
V
HZ
300
150
mV
C
L
50
30
pF
NOTE:
1. Diagramshown for input Control Enable-LOW and input Control Disable-HIGH.
Enable and Disable Times
NOTES:
1. Pulse Generator for All Pulses: Rate
10MHz; t
F
2.5ns; t
R
2.5ns.
2. Pulse Generator for All Pulses: Rate
10MHz; t
F
2ns; t
R
2ns.
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termnation resistance: should be equal to Z
OUT
of the Pulse Generator.
SWITCH POSITION
Test
t
PLZ
/
t
PZL
t
PHZ/
t
PZH
Switch
V
LOAD
GND
Open
t
PD
Propagation Delay
Test Circuits for All Outputs
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