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参数资料
| 型号： | IDTQS74FCT2543CTSO |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 总线收发器 |
| 英文描述： | FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封装： | SOIC-24 |
| 文件页数： | 5/6页 |
| 文件大小： | 126K |
| 代理商： | IDTQS74FCT2543CTSO |
5
IDTQS74FCT2543AT/CT
HIGH-SPEEDCMOS8-BITBUSINTERFACELATCHTRANSCEIVER
INDUSTRIALTEMPERATURERANGE
Pulse
Generator
R T
D.U.T.
VCC
VIN
C L
VOUT
50pF
500
500
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
IN PU T
TIM IN G
IN PU T
ASYNCHRON OUS C ONTROL
PRES ET
CLEAR
ETC.
SYNC HRO N OU S CON TRO L
tSU
tH
tREM
tSU
tH
HIGH-LOW -HIGH
PULSE
LO W -H IGH -LOW
PULSE
tW
1.5V
SAM E PHASE
IN PU T TR ANSITION
3V
1.5V
0V
1.5V
VOH
tPLH
OU TPUT
OPPOSITE P HASE
IN PU T TR ANSITION
3V
1.5V
0V
tPLH
tPHL
VOL
CO NTR OL
IN PU T
3V
1.5V
0V
3.5V
0V
OU TPUT
NO RM A LLY
LO W
OU TPUT
NO RM A LLY
HIGH
SW ITC H
CLOSE D
SW ITC H
OPEN
VOL
0.3V
tPLZ
tPZL
tPZH
tPHZ
3.5V
0V
1.5V
ENAB LE
DISA BLE
VOH
PRES ET
CLEAR
CLOC K ENABLE
ETC.
FC TL lin k
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
SET-UP, HOLD, AND RELEASE TIMES
PULSE WIDTH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate
≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
SWITCH POSITION
Test
Switch
Open Drain
Disable Low
Closed
Enable Low
All Other Tests
Open
FCTL
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| IDTQS74FCT2573ATQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LATCH|SINGLE|8-BIT|FCT/PCT-CMOS|SOP|20PIN|PLASTIC |
| IDTQS74FCT2573ATSO | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit D-Type Latch |
| IDTQS74FCT2573TQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:LATCH|SINGLE|8-BIT|FCT/PCT-CMOS|SOP|20PIN|PLASTIC |
| IDTQS74FCT2573TSO | 制造商:未知厂家 制造商全称:未知厂家 功能描述:8-Bit D-Type Latch |
| IDTQS74FCT2574ATQ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Buffer/Driver |
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