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参数资料
| 型号： | IFD-53110 |
| 元件分类： | 谐振器 |
| 英文描述： | ECL SERIES, PRESCALER, CQMW4 |
| 封装： | 0.100 INCH, HERMETIC SEALED, STRIPLINE-4 |
| 文件页数： | 2/5页 |
| 文件大小： | 86K |
| 代理商： | IFD-53110 |
7-152
Absolute Maximum Ratings
Symbol
Parameter
Units
Absolute Maximum[1]
V
cc - Vee
Device Voltage
V
8
P
diss
Power Dissipation[2,3]
mW
650
P
in
RF Input Power
dBm
+15
T
j
Junction Temperature
°C
200
T
STG
Storage Temperature
°C
-65to+200
Thermal Resistance[2]:
θ
jc = 107°C/W
Notes:
1, Operation of this device above any one of these parameters may cause permanent damage.
2. Tcase = 25°C.
3. Derate at 9.3 mW/
°C for T
C ≥ 130°C.
Typical Design Information, T
A = 25°C, Z0 = 50 , Vcc - Vee = 5.0 V, Pin = -10 dBm.
All values apply to both IFD-53010 and IFD-53110. f
test is 5 GHz for IFD-53010 and 3 GHz for IFD-53110 (unless
otherwise noted).
Symbol
Parameters and Test Conditions
Units
Value
F
MIN
Minimum Clock Frequency[1]
MHz
150
P
in
Input Sensitivity
f = f
test
dBm
-22
mVpp
50
Pout
Output Power
f = 0.15 to ftest
dBm
-5
mVpp
355
VSWR
Input VSWR
f = 0.15 to f
test
2.0:1
Output VSWR
f = 0.15 to f
test
2.5:1
PN
SSB Phase Noise
f = 3 GHz, 1 kHz offset
dBc/Hz
-143
f = 5 GHz, 1 kHz offset (IFD-53010 only)
-138
Tr
Output Rise Time, 20% - 80%
f = ftest
psec
145
T
f
Output Fall Time, 20% - 80%
f = f
test
psec
85
Note:
1. Minimum clock frequency when driven from a sinusoidal input. Operation to lower frequencies is possible when using input signals
with faster rise times, such as occurs in the case of a cascade of two or more IFDs.
Guaranteed Electrical Specifications, IFD-53010 and IFD-53110
T
A = 25°C, ZO = 50 , Vcc - Vee = 5.0 V
Symbol
Parameters and Test Conditions
Units
Min.
Typ.
Max.
IFD-53010:
FMAX
Maximum Clock Frequency
Pin = -10 dBm (200 mVpp)
GHz
5.5
6.0
IFD-53110:
F
MAX
Maximum Clock Frequency
P
in = -10 dBm (200 mVpp)
GHz
3.5
5.0
I
CC
IFD-53010 and IFD-53110: Supply Current
mA
35
43
50
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