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参数资料
| 型号： | ILC1232 |
| 厂商： | Impala Linear Corporation |
| 英文描述： | mP Supervisory Circuit |
| 中文描述： | 手机监控电路 |
| 文件页数： | 2/5页 |
| 文件大小： | 75K |
| 代理商： | ILC1232 |
Parameter
Symbol
V
CC
All other inputs
V
CC
GND, All other
inputs
T
A
Ratings
-0.3 to 6.0
-0.3 to (V
CC
+ 0.3)
250
25
Units
V
V
mA
mA
Terminal Voltage
Input Current
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
Power Dissipation
-40 to +85
-65 to +150
300
700
°C
°C
°C
mW
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliabil-
ity. Operating ranges define those limits between which the functionality of the device is guaranteed.
V
CC
= 4.5 V to 5.5 V, T
A
= Operating Temperature Range, unless otherwise noted.
Parameter
Operating Voltage Range, V
CC
Supply Current, I
CC
ST and PBRST Input Levels
Conditions
(See Note 1)
V
IH
(See Note 2)
V
IL
V
OH
= 2.4V
V
OL
= 0.4V
TOL= GND
TOL= V
CC
C
IN
(See Note 3)
C
OUT
(See Note 3)
PBRST = V
IL
(See Note 4)
TD = 0V
TD = Open
TD = V
CC
V
CC
Falling at 1.66 mV/
μ
s
V
CC
Rising (See Note 5)
Min
4.5
2.0
-0.3
1.0
2.0
4.50
4.25
20
1
250
20
62.5
250
500
10
0
250
Typ
18
Max
5.5
40
V
CC
+ 0.3
0.8
1
4.74
4.49
5
7
20
1000
250
1000
2000
150
1000
Units
V
μ
A
V
Input Leakage, I
IL
Output Source Current, RST
Output Sink Current, RST, RST
V
CC
5% Trip Point (Reset Threshold Voltage)
V
CC
10% Trip Point (Reset Threshold Voltage)
Input Capacitance, ST, TOL
Output Capacitance, RST, RST
PBRST Min. Pulse Width, t
PB
PBRST Delay, t
PBD
Reset Active Time, t
RST
ST Pulse Width, t
ST
ST Timeout Period, t
TD
μ
A
mA
mA
V
V
pF
pF
ms
ms
ms
ns
ms
10
10
4.62
4.37
4
610
150
600
1200
50
610
V
CC
Fall Time, t
F
V
CC
Rise Time, t
R
V
CC
Detect to RST Low and RST High, tRPD
V
CC
Detect to RST Open and RST Low, tRPU
μ
s
ns
μ
s
ms
Note 1: I
CC
is measured with outputs open and inputs within 0.5V of supply rails.
Note 2: PBRST has an internal 40k
(typical) pull-up resistor to V
CC
.
Note 3: Guaranteed by design.
Note 4: PBRST must be held low for a minimum of 20ms to guarantee a reset.
Note 5: RST has an open drain output.
ILC1232 mP Supervisory Circuit
Sept 1999
Impala Linear Corporation
2
(408) 574-3939
www.impalalinear.com
ILC1232 1.1
June 1999
Absolute Maximum Ratings
Electrical Characterisitcs
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