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参数资料
| 型号： | ILC1832M |
| 厂商： | Impala Linear Corporation |
| 英文描述： | SWITCH DIP 2POS TOP ACT SEALED |
| 中文描述： | レP监控电路 |
| 文件页数： | 3/5页 |
| 文件大小： | 78K |
| 代理商： | ILC1832M |
Pin
Number
1
Pin
Name
PBRST
Description
Pushbutton reset input. This input is debounced and can be driven with external logic
signals or a mechanical pushbutton to actively force a reset. All pulses less than 1ms in
duration on the PBRST pin are ignored. Any pulse with a duration of 20ms or greater is
guaranteed to cause a reset. PBRST has an internal 40k
(typical) pull-up resistor to V
CC
.
Time delay input. This input selects the timebase used by the watchdog timer. When TD =
0V, the watchdog timeout period is set to a nominal value of 150ms, when TD = open, the
watchdog timeout period is set to a nominal value of 600ms and when TD = V
CC
, the
watchdog timeout period is 1.2 sec nominally.
Tolerance select input. Selects whether 5% or 10% of V
CC
is used as the reset threshold
voltage. When TOL = 0V, the 5% tolerance level is selected and when TOL = V
CC
, a 10%
tolerance level is selected.
Ground pin, 0V reference.
RST is asserted high if either V
CC
goes below the reset threshold, the watchdog times out or
PBRST is pulled low for a minimum of 20ms. RST remains asserted for one reset timeout
period after V
CC
exceeds the reset threshold or after the watchdog times out or after PBRST
goes high.
RST is asserted low if either V
CC
goes below the reset threshold, the watchdog times out or
PBRST is pulled low for a minimum of 20ms. RST remains asserted for one reset timeout
period after V
CC
exceeds the reset threshold or after the watchdog times out or after PBRST
goes high. Open-drain output.
Input to the watchdog timer. If ST does not see a transition from high to low within the
watchdog timeout period, RST and RST will be asserted.
Power supply input.
2
TD
3
TOL
4
5
GND
RST
6
RST
7
ST
8
V
CC
8
1
Reset
Generator
6
4
-
+
V
CC
ST
RST
GND
3
7
2
Trip Point
Select
Ref
Manual Reset
Debounce
Watchdog
Timer
Timeout
Select
5
RST
TOL
PBRST
TD
μP Supervisory Circuit
Preliminary
Pin Functions
Block Diagram
Impala Linear Corporation
3
(408) 574-3939
www.impalalinear.com
October 1999
ILC1832 1.1
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ILC1832N | 制造商:IMPALA 制造商全称:IMPALA 功能描述:レP SUPERVISORY CIRCUIT |
| IL-C2-0001 | 制造商:Japan Aviation Electronics (JAE) 功能描述: |
| IL-C2-10000 | 功能描述:集管和线壳 SOCKET CONTACT RoHS:否 产品种类:1.0MM Rectangular Connectors 产品类型:Headers - Pin Strip 系列:DF50 触点类型:Pin (Male) 节距:1 mm 位置/触点数量:16 排数:1 安装风格:SMD/SMT 安装角:Right 端接类型:Solder 外壳材料:Liquid Crystal Polymer (LCP) 触点材料:Brass 触点电镀:Gold 制造商:Hirose Connector |
| IL-C2-10000.P | 制造商:Japan Aviation Electronics (JAE) 功能描述:CUT - IL-C2-1-10000 |
| IL-C2-1-00001 | 制造商:Japan Aviation Electronics (JAE) 功能描述:10,000 PER REEL SOLD PER REEL |
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