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参数资料
| 型号： | IMISG522BXB |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, PDSO16 |
| 文件页数： | 6/12页 |
| 文件大小： | 120K |
| 代理商： | IMISG522BXB |
SG521/22/24/28
Spread Spectrum Clock Generator
Approved Product
INTERNATIONAL MICROCIRCUITS,INC. 525 LOS COCHES ST.,
Rev. 1.3
7/21/1999
MILPITAS, CA 95035 408-263-6300, FAX 408-263-6571
Page 3 of 12
http:/www.imicorp.com
Pin Configuration
Figure 2. SG521/22/24/28 SOIC Package Pin Assignment
Pin Description
Pin
#
Signal
Name
I/O
Default
State
Description
1
VDD
P
Power
Positive Power Supply.
2
OSCin
I
N/A
Input pin of on-chip reference oscillator.
3
OSCout
O
N/A
Output pin of on-chip reference oscillator. If Crystal Oscillator is used, this pin is left unconnected.
4
VSS
P
GND.
Power Supply Ground.
5
S4
I
1
Digital logic input used to select required crystal input frequency range, frequency spread clock
(PRCLK) and non-spread clock MPCLK output frequencies. This pin has internal 150 K ohm pull-up
resistor to VDD. Refer to Frequency Selection Tables for Truth Table.
6
VDD
P
Positive Power Supply
7S0
I
0
Digital logic input used to select required crystal input frequency range, frequency spread clock
(PRCLK) and non-spread clock MPCLK output frequencies. This pin has internal 150 K ohm pull-down
resistor to GND. Refer to Frequency Selection Tables for Truth Table.
8S1
I
0
Digital logic input used to select required crystal input frequency range, frequency spread clock
(PRCLK) and non-spread clock MPCLK output frequencies. This pin has internal 150 K ohm pull-down
resistor to GND. Refer to Frequency Selection Tables for Truth Table.
9
SSON
I
1
Input digital control pin used to enable or disable the frequency modulation function at PRCLK Output
(Pin-12). When this pin is low (GND) spread function is on. When high (VDD), spread function is turned-
off. This pin has 150 K ohm internal pulled-up to VDD.
10
SS-SEL
I
1
Used to select total Frequency Modulation (Spread) amount. The spread is either 1.00%(Narrow) or
3.00%(Wide). Both spreads are down-center with respect to output frequency at PRCLK (Pin-12). Refer
to Frequency and Spread selection Tables for the Spread selection logic states. This pin has 150 K
internal pull-up resistor to VDD.
11
VSS
P
GND.
Power Supply Ground
12
PRCLK/S2
I/O
1
Bi-directional pin used to share input control and output drive function. During power-on, this pin is a
digital input and latches that state (High or Low) into an internal register as a valid S2 state. After power
has reached a pre-determined level, pin 12 becomes the driver for the PRCLK modulated output clock.
This pin has 150 K ohm internal pull-up resistor to VDD. For proper operation, an external 4.7 K ohm
resistor connected to VDD or VSS is required. Refer to Frequency Selection Truth Tables for proper
operation.
13
VSS
P
GND.
Power Supply Ground
14
MPCLK/S3
O/I
1
Bi-directional pin used to share input control and output drive function. During power-on, this pin is a
digital input and latches that state (High or Low) into an internal register as a valid S3 state. After power
has reached a pre-determined level, pin 14 becomes the driver for the MPCLK non-modulated output
clock. This pin has 150 K ohm internal pull-up resistor to VDD. Refer to Frequency Selection Truth
Tables for proper operation.
15
VDD
P
Power
Positive Power Supply
16
TEST
I
0
Provides Power-Down and Hi-Z function when used in conjunction with S0 and S1 digital inputs. This
pin has internal pull-down to GND. Refer to Frequency Selection Truth Tables for proper operation.
1
2
3
4
SG521
----------
SG522
----------
SG524
----------
SG528
5
6
7
89
10
11
12
13
14
15
16
VDD
OSCin
OSCout
VSS
S4
VDD
S0
S1
TEST
VDD
MPCLK/S3
VSS
PRCLK/S2
VSS
SS-SEL
SSON
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