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参数资料
| 型号： | IN74AC373DW |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Octal 3-State Noninverting Transparent Latch High-Speed Silicon-Gate CMOS |
| 中文描述： | 八路三态同相透明锁存器高速硅栅CMOS |
| 文件页数： | 4/5页 |
| 文件大小： | 214K |
| 代理商： | IN74AC373DW |
IN74AC373
419
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=3.0 ns)
V
CC
V
*
Guaranteed Limits
25
°
C
Symbol
Parameter
-40
°
C to
85
°
C
Min
Unit
Min
Max
Max
t
PLH
Propagation Delay, Input D to Q
(Figure 1)
3.3
5.0
1.5
1.5
13.5
9.5
1.5
1.5
15.0
10.5
ns
t
PHL
Propagation Delay, Input D to Q
(Figure 1)
3.3
5.0
1.5
1.5
13.0
9.5
1.5
1.5
14.5
10.5
ns
t
PLH
Propagation Delay, Latch Enable to Q (Figure
2)
3.3
5.0
1.5
1.5
13.5
9.5
1.5
1.5
15.0
10.5
ns
t
PHL
Propagation Delay, Latch Enable to Q (Figure
2)
3.3
5.0
1.5
1.5
12.5
9.5
1.5
1.5
14.0
10.5
ns
t
PZH
Propagation Delay, Output Enable to Q
(Figure 3)
3.3
5.0
1.5
1.5
11.5
8.5
1.0
1.0
13.0
9.5
ns
t
PZL
Propagation Delay, Output Enable to Q
(Figure 3)
3.3
5.0
1.5
1.5
11.5
8.5
1.0
1.0
13.0
9.5
ns
t
PHZ
Propagation Delay, Output Enable to Q
(Figure 3)
3.3
5.0
1.5
1.5
12.5
11.0
1.0
1.0
14.5
12.5
ns
t
PLZ
Propagation Delay, Output Enable to Q
(Figure 3)
3.3
5.0
1.5
1.5
11.5
8.5
1.0
1.0
12.5
10.0
ns
C
IN
Maximum Input Capacitance
5.0
4.5
4.5
pF
Typical @25
°
C,V
CC
=5.0 V
40
C
PD
Power Dissipation Capacitance
pF
*
Voltage Range 3.3 V is 3.3 V
±
0.3 V
Voltage Range 5.0 V is 5.0 V
±
0.5 V
TIMING REQUIREMENTS
(C
L
=50pF,Input t
r
=t
f
=3.0 ns)
V
CC
V
*
Guaranteed Limits
25
°
C
Symbol
Parameter
-40
°
C to
85
°
C
6.0
4.5
Unit
t
su
Minimum Setup Time, Input D to Latch
Enable (Figure 4)
3.3
5.0
5.5
4.0
ns
t
h
Minimum Hold Time, Latch Enable to
Input D (Figure 4)
3.3
5.0
1.0
1.0
1.0
1.0
ns
t
w
Minimum Pulse Width, Latch Enable
(Figure 2)
3.3
5.0
5.5
4.0
6.0
4.5
ns
*
Voltage Range 3.3 V is 3.3 V
±
0.3 V
Voltage Range 5.0 V is 5.0 V
±
0.5 V
相关PDF资料 |
PDF描述 |
|---|---|
| IN74AC373N | Octal 3-State Noninverting Transparent Latch High-Speed Silicon-Gate CMOS |
| IN74AC573 | Octal 3-State Noninverting Transparent Latch |
| IN74AC573DW | Octal 3-State Noninverting Transparent Latch |
| IN74AC573N | Octal 3-State Noninverting Transparent Latch |
| IN74AC640 | Octal 3-State Inverting Bus Transceiver |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IN74AC373N | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Octal 3-State Noninverting Transparent Latch High-Speed Silicon-Gate CMOS |
| IN74AC374 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Octal 3-State Noninverting D Flip-Flop High-Speed Silicon-Gate CMOS |
| IN74AC374DW | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Octal 3-State Noninverting D Flip-Flop High-Speed Silicon-Gate CMOS |
| IN74AC374N | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:Octal 3-State Noninverting D Flip-Flop High-Speed Silicon-Gate CMOS |
| IN74AC533 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Octal 3-State Inverting Transparent Latch High-Speed Silicon-Gate CMOS |
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