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参数资料
| 型号： | IN74ACT299DW |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | 8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| 中文描述： | 8位双向通用移位寄存器与并行I / O |
| 文件页数： | 4/7页 |
| 文件大小： | 243K |
| 代理商： | IN74ACT299DW |
IN74ACT299
4
AC ELECTRICAL CHARACTERISTICS
(V
CC
=5.0 V
±
10%, C
L
=50pF,Input t
r
=t
f
=3.0 ns)
Symbol
Parameter
Guaranteed Limits
25
°
C
-40
°
C to
85
°
C
Min
110
3.0
Unit
Min
120
4.0
Max
12.5
Max
14.0
f
max
t
PLH
Maximum Clock Frequency (Figure 1)
Propagation Delay, Clock to Q
A
’ or Q
H
’
(Figure 1)
Propagation Delay, Clock to Q
A
’ or Q
H
’
(Figure 1)
Propagation Delay, Clock to Q
A
thru Q
H
(Figure 1)
Propagation Delay, Clock to Q
A
thru Q
H
(Figure 1)
Propagation Delay, Reset to Q
A
’ or Q
H
’
(Figure 2)
Propagation Delay, Reset to Q
A
thru Q
H
(Figure 2)
Propagation Delay , OE1, OE2 to Q
A
thru
Q
H
(Figure 3)
Propagation Delay , OE1, OE2 to Q
A
thru
Q
H
(Figure 3)
Propagation Delay , OE1, OE2 to Q
A
thru
Q
H
(Figure 3)
Propagation Delay , OE1, OE2 to Q
A
thru
Q
H
(Figure 3)
Maximum Input Capacitance
MHz
ns
t
PHL
4.0
13.5
3.5
15.0
ns
t
PLH
4.5
12.5
4.5
13.5
ns
t
PHL
5.0
15.0
4.5
16.5
ns
t
PHL
4.0
15.0
4.0
18.0
ns
t
PHL
4.0
14.5
3.5
17.5
ns
t
PZH
2.5
12.0
1.5
13.0
ns
t
PZL
2.0
12.0
1.5
13.5
ns
t
PHZ
2.0
12.5
2.0
13.5
ns
t
PLZ
2.5
11.5
2.0
12.5
ns
C
IN
4.5
4.5
pF
Power Dissipation Capacitance
Typical @25
°
C,V
CC
=5.0 V
170
C
PD
pF
TIMING REQUIREMENTS
(V
CC
=5.0 V
±
10%, C
L
=50pF, Input t
r
=t
f
=3.0 ns)
Guaranteed
Limits
25
°
C
Symbo
l
t
su
Parameter
-40
°
C to
85
°
C
5.5
Unit
Minimum Setup Time, Mode Select S1 or S2 to Clock
(Figure 4)
Minimum Setup Time, Data Inputs P
A
thru P
H
to Clock
(Figure 4)
Minimum Setup Time, Data Inputs S
A
, S
H
to Clock (Figure 4)
Minimum Hold Time, Clock to Mode Select S1 or S2 (Figure
4)
Minimum Hold Time, Clock to Data Inputs P
A
thru P
H
(Figure
4)
Minimum Hold Time, Clock to Data Inputs S
A
, S
H
(Figure 4)
Minimum Recovery Time, Reset Inactive to Clock (Figure 2)
Minimum Pulse Width, Clock (Figure 1)
Minimum Pulse Width, Reset (Figure 2)
5.0
ns
t
su
4.0
4.5
ns
t
su
t
h
4.5
1.0
5.0
1.0
ns
ns
t
h
1.0
1.0
ns
t
h
t
rec
t
w
t
w
1.0
1.5
4.0
3.5
1.0
1.5
4.5
3.5
ns
ns
ns
ns
相关PDF资料 |
PDF描述 |
|---|---|
| IN74ACT299N | 8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| IN74ACT323 | 8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| IN74ACT323DW | 8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| IN74ACT323N | 8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| IN74ACT32 | Quad 2-Input OR Gate |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IN74ACT299N | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| IN74ACT32 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Quad 2-Input OR Gate |
| IN74ACT323 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| IN74ACT323DW | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
| IN74ACT323N | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O |
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