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参数资料
| 型号： | IN74ACT652N |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | OCTAL 3-STATE BUS TRANSCEIVERS AND D FLIP-FLOPS |
| 中文描述： | 八路三态总线收发器和D触发器 |
| 文件页数： | 6/8页 |
| 文件大小： | 282K |
| 代理商： | IN74ACT652N |
IN74ACT652
6
FUNCTION TABLE
A
INPUTS
Z
Dir.
L
OE CAB CBA SAB SBA
H
X
X
B
FUNCTION
INPUTS
Both the A bus and the B bus are inputs.
Z
The output functions of the A and B bus
are disabled.
INPUTS
Both the A and B bus are used for inputs
to the internal flip-flops. Data at the bus
will be stored on low to high transition of
the clock inputs.
INPUTS
The A bus are outputs and the B bus are
inputs.
L
H
A bus.
L
H
A bus. The data of the B bus are stored to
the internal flip-flops on low to high
transition of the clock pulse.
X
The data stored to the internal flip-flops,
are displayed at the A bus.
H
L
internal flip-flops on low to high transition
of the clock pulse. The states of the
internal flip-flops output directly to the A
bus.
INPUTS OUTPUTS
The A bus are inputs and the B bus are
outputs.
L
H
H
B bus.
L
H
H
A bus. The data of the B bus are stored to
the internal flip-flops on low to high
transition of the clock pulse.
X
Qn
The data stored to the internal flip-flops
are displayed at the B bus.
L
H
H
internal flip-flops on low to high transition
of the clock pulse. The states of the
internal flip-flops output directly to the B
bus.
OUTPUTS OUTPUTS
Both the A bus and the B bus are outputs
Qn
Qn
The data stored to the internal flip-flops
are displayed at the A and B bus
respectively.
Qn
Qn
The output at the A bus are displayed at
the B bus, the output at the B bus are
displayed at the A bus respec.
X
X
X
X
INPUTS
OUTPUTS
X
*
X
X
L
L
H
L
H
The data at the B bus are displayed at the
L
L
X
*
X
L
The data at the B bus are displayed at the
X
*
X
X
H
Qn
X
*
X
H
H
L
The data at the B bus are stored to the
X
X
*
L
X
L
The data at the A bus are displayed at the
H
H
X
*
L
X
L
The data at the B bus are displayed at the
X
X
*
H
X
X
*
H
X
L
The data at the A bus are stored to the
H
L
X
X
H
H
H
H
X : DON’T CARE
Z : HIGH IMPEDANCE
Qn : THE DATA STORED TO THE INTERNAL FLIP-FLOPS BY MOST RECENT LOW TO HIGH
TRANSITION OF THE CLOCK INPUTS
*
: THE DATA AT THE A AND B BUS WILL BE STORED TO THE INTERNAL FLIP-FLOPS ON EVERY
LOW TO TRANSITION OF THE CLOCK INPUTS
相关PDF资料 |
PDF描述 |
|---|---|
| IN74ACT74D | DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT74N | DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT74 | DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT86 | Quad 2-Input Exclusive OR Gate |
| IN74ACT86D | Quad 2-Input Exclusive OR Gate |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IN74ACT74 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT74D | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT74N | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:DUAL D FLIP-FLOP WITH SET AND RESET |
| IN74ACT86 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Quad 2-Input Exclusive OR Gate |
| IN74ACT86D | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Quad 2-Input Exclusive OR Gate |
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