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参数资料
| 型号： | IN74HC125A |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS |
| 中文描述： | 四三态同相缓冲器高性能硅栅CMOS |
| 文件页数： | 2/5页 |
| 文件大小： | 88K |
| 代理商： | IN74HC125A |
IN74HC125A
119
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
V
IN
V
OUT
I
IN
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
-1.5 to V
CC
+1.5
-0.5 to V
CC
+0.5
±
20
±
35
±
75
750
500
V
DC Output Voltage (Referenced to GND)
V
DC Input Current, per Pin
mA
I
OUT
DC Output Current, per Pin
mA
I
CC
DC Supply Current, V
CC
and GND Pins
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
mW
Tstg
Storage Temperature
-65 to +150
°
C
°
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
°
C from 65
°
to 125
°
C
SOIC Package: : - 7 mW/
°
C from 65
°
to 125
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
V
IN
, V
OUT
T
A
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
+125
V
°
C
ns
Operating Temperature, All Package Types
-55
t
r
, t
f
Input Rise and Fall Time (Figure 1)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
0
0
0
1000
500
400
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND
≤
(V
IN
or V
OUT
)
≤
V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open.
相关PDF资料 |
PDF描述 |
|---|---|
| IN74HC125AD | Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS |
| IN74HC125AN | Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS |
| IN74HC132A | QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS High-Performance Silicon-Gate CMOS |
| IN74HC132AD | QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS High-Performance Silicon-Gate CMOS |
| IN74HC132AN | QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS High-Performance Silicon-Gate CMOS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IN74HC125AD | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS |
| IN74HC125AN | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS |
| IN74HC132A | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS High-Performance Silicon-Gate CMOS |
| IN74HC132AD | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High-Performance Silicon-Gate CMOS |
| IN74HC132AN | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:QUAD 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS High-Performance Silicon-Gate CMOS |
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