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参数资料
| 型号： | IN74HC174A |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS |
| 中文描述： | 六角D触发器与普通时钟和复位高性能硅栅CMOS触发器 |
| 文件页数： | 4/6页 |
| 文件大小： | 51K |
| 代理商： | IN74HC174A |
IN74HC174A
4
INTEGRAL
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF, Input t
r
=t
f
=6.0 ns, V
IL
= 0 V, V
IH
=Vcc)
V
CC
Guaranteed Limit
Symbol
Parameter
V
-55
°
C
to
25
°
C
≤
85
°
C
≤
125
°
C
Unit
f
max
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
2.0
4.5
6.0
6.0
30
35
4.8
24
28
4.0
20
24
MHz
t
PLH
, t
PHL
Maximum Propagation Delay, Clock to Q (Figures
1 and 4)
2.0
4.5
6.0
110
22
19
140
28
24
165
33
28
ns
t
PHL
Maximum Propagation Delay , Reset to Q
(Figures 2 and 4)
2.0
4.5
6.0
110
21
19
140
28
24
160
32
27
ns
t
TLH
, t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
C
IN
Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Enabled
Output)
Typical @25
°
C,V
CC
=5.0 V
C
PD
Used to determine the no-load dynamic power
consumption: P
D
=C
PD
V
CC
2
f+I
CC
V
CC
62
pF
TIMING REQUIREMENTS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns, V
IL
= 0 V, V
IH
=Vcc)
V
CC
Guaranteed Limit
Symbol
Parameter
V
-55
°
C to
25
°
C
≤
85
°
C
≤
125
°
C
Unit
t
SU
Minimum Setup Time, Data to
Clock (Figure 3)
2.0
4.5
6.0
50
10
9
65
13
11
75
15
13
ns
t
h
Minimum Hold Time, Clock to
Data (Figure 3)
2.0
4.5
6.0
5
5
5
5
5
5
5
5
5
ns
t
rec
Minimum Recovery Time,
Reset Inactive to Clock (Figure
2)
2.0
4.5
6.0
5
5
5
5
5
5
5
5
5
ns
t
w
Minimum Pulse Width, Clock
(Figure 1)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
t
w
Minimum Pulse Width, Reset
(Figure 2)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
t
r,
t
f
Maximum Input Rise and Fall
Times (Figure 1)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
ns
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相关代理商/技术参数 |
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|---|---|
| IN74HC174AD | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS |
| IN74HC174AN | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Hex D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS |
| IN74HC175A | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:Quad D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS |
| IN74HC175AD | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:Quad D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS |
| IN74HC175AN | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:Quad D Flip-Flop with Common Clock and Reset High-Performance Silicon-Gate CMOS |
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