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参数资料
| 型号： | IN74HC193N |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 元件分类： | 通用总线功能 |
| 英文描述： | Presettable 4-Bit Binary UP/DOWN Counter High-Performance Silicon-Gate CMOS |
| 中文描述： | 可预置4位二进制加/减计数器高性能硅栅CMOS |
| 文件页数： | 4/7页 |
| 文件大小： | 229K |
| 代理商： | IN74HC193N |
IN74HC193
261
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
V
Guaranteed Limit
25
°
C to
-55
°
C
12
36
43
Symbol
Parameter
≤
85
°
C
≤
125
°
C
Unit
f
max
Minimum Clock Frequency (50% Duty Cycle)
(Figures 1 and 6)
2.0
4.5
6.0
3.2
16
19
2.6
13
15
MHz
t
PLH
, t
PHL
Maximum Propagation Delay, Clock to Q
(Figures 1 and 6)
2.0
4.5
6.0
215
43
37
270
54
46
325
65
55
ns
t
PLH
, t
PHL
Maximum Propagation Delay, PL to Q
(Figures 3 and 6)
2.0
4.5
6.0
215
43
37
270
54
46
325
65
55
ns
t
PLH
, t
PHL
Maximum Propagation Delay, Clock to Terminal
Count (Figures 2 and 6)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
t
TLH
, t
THL
Maximum Output Transition Time,Any Output
(Figures 1 and 6)
2.0
4.5
6.0
75
15
13
95
20
18
110
23
20
ns
C
IN
Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Package)
Typical @25
°
C,V
CC
=5.0 V
60
C
PD
Used to determine the no-load dynamic power
consumption: P
D
=C
PD
V
CC
2
f+I
CC
V
CC
pF
TIMING REQUIREMENTS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
V
Guaranteed Limit
Symbol
Parameter
25
°
C to -55
°
C
100
20
18
≤
85
°
C
125
35
22
≤
125
°
C
150
30
26
Unit
t
su
Minimum Setup Time, Pn to PL
(Figure 4)
2.0
4.5
6.0
ns
t
h
Minimum Hold Time, Pn to PL
(Figure 4)
2.0
4.5
6.0
0
0
0
0
0
0
0
0
0
ns
t
w
Minimum Pulse Width, Clock (Figure
1)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
t
w
Minimum Pulse Width, PL
(Figure 3)
2.0
4.5
6.0
100
20
17
125
25
26
150
30
26
ns
t
w
Minimum Pulse Width, MR
(Figure 5)
2.0
4.5
6.0
100
20
17
125
25
26
150
30
26
ns
t
r
, t
f
Minimum Input Rise and Fall Times
(Figure 1)
2.0
4.5
6.0
100
500
400
100
500
400
100
500
400
ns
相关PDF资料 |
PDF描述 |
|---|---|
| IN74HC193D | RSS Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 09V; Power: 1W; 1kVDC and 3kVDC Isolation Options; Approved for Medical Applications; Suitable for Automated Assembly; 8, 10 and 12 pin Pinning Style Options; Optional Continuous Short Circuit Protected; Efficiency to 85% |
| IN74HC20A | Dual 4-Input NAND Gate High-Performance Silicon-Gate CMOS |
| IN74HC20AD | Dual 4-Input NAND Gate High-Performance Silicon-Gate CMOS |
| IN74HC20AN | Dual 4-Input NAND Gate High-Performance Silicon-Gate CMOS |
| IN74HC20 | DUAL 4-INPUT NAND GATE |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IN74HC20 | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:DUAL 4-INPUT NAND GATE |
| IN74HC20A | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Dual 4-Input NAND Gate High-Performance Silicon-Gate CMOS |
| IN74HC20AD | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Dual 4-Input NAND Gate High-Performance Silicon-Gate CMOS |
| IN74HC20AN | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:Dual 4-Input NAND Gate High-Performance Silicon-Gate CMOS |
| IN74HC20D | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:DUAL 4-INPUT NAND GATE |
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