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参数资料
| 型号： | IN74HCT163A |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Replaced by SN74ABT574A : Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SSOP -40 to 85 |
| 中文描述： | 预置计数器 |
| 文件页数： | 4/8页 |
| 文件大小： | 188K |
| 代理商： | IN74HCT163A |
IN74HCT163A
4
AC ELECTRICAL CHARACTERISTICS
(V
CC
=5.0 V
±
10%, C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Symbol
Parameter
Guaranteed Limit
25
°
C to
-55
°
C
30
34
41
32
≤
85
°
C
24
43
51
40
≤
125
°
C
20
51
62
48
Unit
f
max
t
PLH
t
PHL
t
PLH
Maximum Clock Frequency (Figures 1,6)
Maximum Propagation Delay, Clock to Q
(Figures 1,6)
Maximum Propagation Delay, Enable T
to Ripple Carry Out (Figures 2,6)
Maximum Propagation Delay, Clock to
Ripple
Carry Out (Figures 1,6)
t
TLH
, t
THL
Maximum Output Transition Time, Any
Output, (Figures 1 and 6)
C
IN
Maximum Input Capacitance
MHz
ns
ns
ns
t
PHL
t
PLH
39
35
49
44
59
53
ns
ns
t
PHL
43
15
54
19
65
22
ns
ns
10
10
10
pF
Power Dissipation Capacitance (Per
Gate)
Used to determine the no-load dynamic
power
P
D
=C
PD
V
CC
TIMING REQUIREMENTS
(V
CC
=5.0 V
±
10%, C
L
=50pF,Input t
r
=t
f
=6.0 ns)
Symbol
Parameter
Typical @25
°
C,V
CC
=5.0 V
C
PD
consumption:
2
f+I
CC
V
CC
+
I
CC
V
CC
60
pF
Guaranteed Limit
25
°
C to
-55
°
C
30
≤
85
°
C
38
≤
125
°
C
45
Unit
t
su
Minimum Setup Time, Preset Data Inputs to
Clock (Figure 4)
Minimum Setup Time, Load to Clock (Figure
4)
Minimum Setup Time, Reset to Clock
(Figure 3)
Minimum Setup Time, Enable T or Enable P
to Clock (Figure 5)
Minimum Hold Time, Clock to Preset Data
Inputs (Figure 4)
Minimum Hold Time, Clock to Load (Figure
4)
Minimum Hold Time, Clock to Reset (Figure
3)
Minimum Hold Time, Clock to Enable T or
Enable P (Figure 5)
Minimum Recovery Time, Load Inactive to
Clock (Figure 4)
Minimum Pulse Width, Clock (Figure 1)
Minimum Pulse Width, Reset (Figure 4)
Maximum Input Rise and Fall Times (Figure
1)
ns
t
su
27
34
41
ns
t
su
32
40
48
ns
t
su
40
50
60
ns
t
h
10
13
15
ns
t
h
3
3
3
ns
t
h
3
3
3
ns
t
h
3
3
3
ns
t
rec
25
31
38
ns
t
w
t
w
t
r,
t
f
16
16
500
20
20
500
24
24
500
ns
ns
ns
相关PDF资料 |
PDF描述 |
|---|---|
| IN74HCT163AD | Replaced by SN74ABT574A : Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SOIC -40 to 85 |
| IN74HCT163AN | PRESETTABLE COUNTERS |
| IN74HCT20A | Dual 4-Input NAND Gate |
| IN74HCT20AD | Dual 4-Input NAND Gate |
| IN74HCT20AN | Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SSOP -40 to 85 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IN74HCT163AD | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:PRESETTABLE COUNTERS |
| IN74HCT163AN | 制造商:INTEGRAL 制造商全称:INTEGRAL 功能描述:PRESETTABLE COUNTERS |
| IN74HCT164A | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:8-BIT SERIAL-INPUT/PARALLEL-OUTPUT SHIFT RESISTER High-Performance Silicon-Gate CMOS |
| IN74HCT164AD | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:8-BIT SERIAL-INPUT/PARALLEL-OUTPUT SHIFT RESISTER High-Performance Silicon-Gate CMOS |
| IN74HCT164AN | 制造商:IKSEMICON 制造商全称:IK Semicon Co., Ltd 功能描述:8-BIT SERIAL-INPUT/PARALLEL-OUTPUT SHIFT RESISTER High-Performance Silicon-Gate CMOS |
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