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参数资料
| 型号： | IN74LV241 |
| 厂商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | Octal Registered Transceivers With 3-State Outputs 24-SOIC -40 to 85 |
| 中文描述： | 八路缓冲器/线路驱动，三态 |
| 文件页数： | 1/5页 |
| 文件大小： | 43K |
| 代理商： | IN74LV241 |
TECHNICAL DATA
1
INTEGRAL
OCTAL BUFFER/LINE DRIVE; 3-STATE
The IN74LV241 is a low-voltage Si-gate CMOS device and is pin and
function compatible with IN74HC/HCT241.
The IN74LV241 is an octal non-inverting buffer/line driver with 3-
state outputs. The 3-state outputs are controlled by the output enable
inputs 1OE and 2OE.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 1.2 to 3.6 V
Low Input Current: 1.0
μ
A, 0.1
μ
à at ò = 25
°
Output Current: 8 mA at V
CC
= 3.0 V
High Noise Immunity Characteristic of CMOS Devices
IN74LV241
N SUFFIX
PLASTIC DIP
DW SUFFIX
SO
1
20
1
20
ORDERING INFORMATION
IN74LV241N
IN74LV241DW
IZ74LV241
T
A
= -40
°
to 125
°
C for all packages
Plastic DIP
SOIC
chip
FUNCTION TABLE
Input
Output
Input
Output
1OE
1An
1Yn
2OE
2An
2Yn
L
L
L
H
L
L
L
H
H
H
H
H
H
X
Z
L
X
Z
H= high level
L = low level
X = don’t care
Z = high impedance
LOGIC DIAGRAM
PIN 20=V
CC
PIN 10 = GND
PIN ASSIGNMENT
1
2
3
5
4
6
7
8
9
10
V
CC
2OE
20
18
17
16
15
14
19
11
12
13
GND
1OE
1A
0
2Y
3
1A
1
2Y
2
1A
2
2Y
1
1A
3
2Y
0
1Y
0
2A
3
1Y
1
2A
2
1Y
2
2A
1
1Y
3
2A
0
2
11
6
15
4
13
8
17
1
19
1A
0
1Y
0
2A
0
2Y
0
1A
2
1Y
2
2A
0
2Y
0
1A
1
1Y
1
2A
1
2Y
1
1A
3
1Y
3
2A
1
2Y
1
1OE
2OE
18
9
14
5
16
7
12
3
DATA
INPUTS
NONINVERTING
OUTPUTS
OUTPUT
ENABLES
相关PDF资料 |
PDF描述 |
|---|---|
| IN74LV241N | Octal Registered Transceivers With 3-State Outputs 24-SO -40 to 85 |
| IN74LV573 | OCTAL D-TYPE TRANSPARENT LATCH (3-STATE) |
| IN74LV573D | Replaced by SN74ABT7819A : 512 x 18 x 2 bidirectional synchronous FIFO memory 80-QFP 0 to 70 |
| IN74LV573N | Replaced by SN74ABT7819A : 512 x 18 x 2 bidirectional synchronous FIFO memory 80-LQFP 0 to 70 |
| IN74LV574DW | Octal D-type flip-flop; positive edge-trigger (3-State) |
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