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参数资料
| 型号： | IP1203PBF |
| 厂商： | International Rectifier |
| 文件页数： | 13/23页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 15A 24LGA |
| 标准包装： | 10 |
| 系列： | iPOWIR™ |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 8 V |
| 输入电压： | 5.5 V ~ 13.2 V |
| 频率 - 开关： | 200kHz ~ 400kHz |
| 电流 - 输出： | 15A |
| 同步整流器： | 是 |
| 工作温度： | -10°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-LGA |
| 包装： | 托盘 |
| 供应商设备封装： | LGA（9x9） |
| 配用： | IRDCIP1203-A-ND - IP1203 REFERENCE DESIGN KIT |
iP1203PbF
(6)
C o >
For better efficiency and low input ripple, select low
ESR ceramic capacitors. The amount of the capaci-
tors is determined based on the rms rating. In the
above example, a total of 3 x 22 μ F, 2A capacitors will
be required to support the input rms current.
Output Capacitor C O Selection
Selection of the output capacitors depends on two
factors:
a. Low effective ESR for ripple and load transient re-
quirements
To support the load transients and to stay within a
specified voltage dip ? V due to the transients, ESR
selection should satisfy equation (4):
R ESR ≤ ? V / I Loadmax (4)
Where,
I Loadmax is the maximum load current.
If output voltage ripple is required to be maintained
at specified levels then the expression in equation
(5) should be used to select the output capacitors.
R ESR ≤ V p-p / I ripple (5)
Where,
V p-p is the peak to peak output ripple voltage .
I ripple is the inductor peak-to peak ripple current.
In addition, the voltage ripple caused by the output
capacitor needs to be significantly smaller than the
ripple caused by the ESR of the capacitor. Use equa-
tion (6) to satisfy this requirement.
10
2 π × f s × R ESR
If the inductor current ripple I ripple is 30% of I OUT1, the
50mV peak to peak output voltage ripple requirement
will be met if the total ESR of the output capacitors is
less than 11m ? . This will require 2 x 470 μ F POSCAP
capacitors. Additional ceramic capacitors can be
added in parallel to further reduce the ESR. Care
should be given to properly compensate the control
loop for low output capacitor ESR values.
www.irf.com
When selecting output capacitors, it is important to
consider the overshoot performance of the power sup-
ply. If the amount of capacitance is not adequate, then,
when unloading the output, the magnitude of the over-
shoot due to stored inductor energy, and depending
on the speed of the response of the control loop, can
exceed the overvoltage trip threshold of the
iP1203PbF and can cause undesirable shutdown of
the output. The magnitude of the overshoot should
be kept below 1.125V OUT . To prevent the overshoot
from tripping the output a delay can be added by in-
stalling capacitor C14 as shown in Fig.14.
b. Stability
The value of the output capacitor ESR zero frequency
f esr plays a major role in determining stability. f esr is
calculated by the expression in equation (7).
f ESR = 1 / (2 π x R ESR x C O ) (7)
Details on how to consider this parameter to design
for stability are outlined in the control loop compen-
sation section of this datasheet.
Inductor L O Selection
Inductor selection is based on trade-offs between size
and efficiency. Low inductor values result in smaller
sizes, but can cause large ripple currents and lower
efficiency. Low inductor values also benefit the tran-
sient performance.
The inductor L o is selected according to equation (8):
L O = V out x (1 - D) / (f sw x I ripple ) (8)
For the above example, and for I ripple of 30% of I OUT , L O
is calculated to be 1.0 μ H.
The core must be selected according to the peak of
maximum output current.
13
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