参数资料
型号: IP1206PBF
厂商: International Rectifier
文件页数: 16/30页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 30A/15A LGA
产品变化通告: (EP) Parts Discontinuation 25/May/2012
标准包装: 5
系列: iPOWIR™
类型: 降压(降压)
输出类型: 可调式
输出数: 1 或 2
输出电压: 0.8 V ~ 5.5 V
输入电压: 7.5 V ~ 14.5 V
PWM 型: 电压模式
频率 - 开关: 200kHz ~ 600kHz
电流 - 输出: 30A,15A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 36-BFLGA
包装: 管件
供应商设备封装: 36-LGA(9.25x15.5)

i P1206PbF
Over-Current Protection
The over current protection is performed by
sensing current through the R DS(on) of low side
MOSFET. This method enhances the converter’s
efficiency and reduce cost by eliminating a
current sense resistor. As shown in Fig. 16, an
external resistor (R OCSET ) is connected between
OCSet pin and the drain of low side MOSFET
(Q2) which sets the current limit set point.
When the overcurrent trip threshold is reached,
the power supply output shuts down and
attempts to restart, entering into the hiccup
Pre-Bias
iP1206 is able to start up into a pre-charged
output, which prevents oscillation and
disturbances of the output voltage.
The output starts in asynchronous fashion and
keeps the synchronous MOSFET off until the first
gate signal for control MOSFET is generated.
The figure below shows a typical Pre-Bias
condition at start up.
Depending on the system configuration, specific
amount of output capacitors may be required to
prevent discharging the output voltage.
mode. The time duration between the shutdown
of the output and the restart is determined by the
Volt
Vo
time it takes to discharge the soft start capacitor.
Pre-Bias Voltage
(Output Voltage before startup)
OC1
Hiccup
iP1206
I OCSET
Q1
Q2
V SW
R OCSET
L1
V OUT
Time
Over Voltage Protection
Over-voltage is sensed through two dedicated
Control
PGND
Fig. 16: Connection of over current sensing resistor
The duty cycle of the hiccup process is typically
5%. The hiccup is performed by charging and
discharging the soft-start capacitor at a certain
slope rate. As shown in Fig. 17 a 3μA current
source is used to discharge the soft-start
capacitor. The OCP comparator resets after
every soft start cycle, the converter stays in this
mode until the overload or short circuit is
removed. Once the condition is removed the
converter will automatically recover. Refer to
Fig. 24 for R OCSET selection.
28uA
sense pins FBS1, FBS2. A separate OVP circuit
is provided for each channel.
The OVP threshold is user programmable and
can be set by two external resistors. Upon over-
voltage condition of either one of the outputs, the
OVP forces a latched shutdown on the fault
output and pulls low the low side driver.
Reset is performed by recycling the Vcc or
Enable. Overvoltage can be sensed either by
connecting FB1s and FB2s to their
corresponding outputs through separate output
voltage divider resistor networks, or they can be
connected directly to their corresponding
feedback pins FB1 and FB2. For Type III
compensation, FB1s and FB2s should be
connected through voltage dividers only.
Power Good
22uA
OCP
The iP1206 provides two separate open collector
power good signals which report the status of the
outputs. The outputs are sensed through the two
SS1 / SD
20
3uA
dedicated V SEN1 and V SEN2 pins.
Once the iP1206 is enabled and the outputs
reach the set value (90% of set value) the power
good signals go open and stay open as long as
Fig. 17: 3uA current source for discharging
soft-start capacitor during hiccup
the outputs stay within the set values.These pins
are open collector and need to be externally
pulled high.
www.irf.com
2/26/2008
16
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